aboutsummaryrefslogtreecommitdiff
path: root/src/shader_recompiler/frontend/maxwell
diff options
context:
space:
mode:
authorliamwhite <liamwhite@users.noreply.github.com>2022-11-11 08:03:40 -0500
committerGitHub <noreply@github.com>2022-11-11 08:03:40 -0500
commitc973029374a731e13f2de240820c818fa2899c2b (patch)
treeab20b418b3c6465e4e9b9503d8d3744f3560ad4b /src/shader_recompiler/frontend/maxwell
parent5eb30c7827959075cd240f39c6ab57d2c2a8197e (diff)
parenta4472b55260ed1ccbad0d191d11abd2330145140 (diff)
Merge pull request #9167 from vonchenplus/tess
video_core: Fix few issues in Tess stage
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index 52be12f9c5..753c620984 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -117,8 +117,7 @@ enum class SpecialRegister : u64 {
case SpecialRegister::SR_THREAD_KILL:
return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))};
case SpecialRegister::SR_INVOCATION_INFO:
- LOG_WARNING(Shader, "(STUBBED) SR_INVOCATION_INFO");
- return ir.Imm32(0x00ff'0000);
+ return ir.InvocationInfo();
case SpecialRegister::SR_TID: {
const IR::Value tid{ir.LocalInvocationId()};
return ir.BitFieldInsert(ir.BitFieldInsert(IR::U32{ir.CompositeExtract(tid, 0)},