diff options
| author | FengChen <vonchenplus@gmail.com> | 2022-10-30 19:59:11 +0800 |
|---|---|---|
| committer | Feng Chen <vonchenplus@gmail.com> | 2022-11-07 15:42:42 +0800 |
| commit | a4472b55260ed1ccbad0d191d11abd2330145140 (patch) | |
| tree | ed58bca8f35b79497099c8c73675332be455c28e /src/shader_recompiler/frontend/maxwell | |
| parent | df38c03a09ad56fdb299d78b39a3951d6ade83aa (diff) | |
video_core: Fix few issues in Tess stage
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell')
| -rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp index 52be12f9c5..753c620984 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp @@ -117,8 +117,7 @@ enum class SpecialRegister : u64 { case SpecialRegister::SR_THREAD_KILL: return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))}; case SpecialRegister::SR_INVOCATION_INFO: - LOG_WARNING(Shader, "(STUBBED) SR_INVOCATION_INFO"); - return ir.Imm32(0x00ff'0000); + return ir.InvocationInfo(); case SpecialRegister::SR_TID: { const IR::Value tid{ir.LocalInvocationId()}; return ir.BitFieldInsert(ir.BitFieldInsert(IR::U32{ir.CompositeExtract(tid, 0)}, |