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| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-02-02 21:07:00 -0300 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-22 21:51:21 -0400 |
| commit | 6c4cc0cd062fbbba5349da1108d3c23cb330ca8a (patch) | |
| tree | 544291931da8a85fafcea71964c77d9278ec7f29 /src/shader_recompiler/frontend/ir/microinstruction.cpp | |
| parent | 2d48a7b4d0666ad16d03a22d85712617a0849046 (diff) | |
shader: SSA and dominance
Diffstat (limited to 'src/shader_recompiler/frontend/ir/microinstruction.cpp')
| -rw-r--r-- | src/shader_recompiler/frontend/ir/microinstruction.cpp | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp index 553fec3b7f..ecf76e23d8 100644 --- a/src/shader_recompiler/frontend/ir/microinstruction.cpp +++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp @@ -30,6 +30,11 @@ static void RemovePseudoInstruction(IR::Inst*& inst, IR::Opcode expected_opcode) bool Inst::MayHaveSideEffects() const noexcept { switch (op) { + case Opcode::Branch: + case Opcode::BranchConditional: + case Opcode::Exit: + case Opcode::Return: + case Opcode::Unreachable: case Opcode::SetAttribute: case Opcode::SetAttributeIndexed: case Opcode::WriteGlobalU8: @@ -113,6 +118,17 @@ void Inst::SetArg(size_t index, Value value) { args[index] = value; } +std::span<const std::pair<Block*, Value>> Inst::PhiOperands() const noexcept { + return phi_operands; +} + +void Inst::AddPhiOperand(Block* predecessor, const Value& value) { + if (!value.IsImmediate()) { + Use(value); + } + phi_operands.emplace_back(predecessor, value); +} + void Inst::Invalidate() { ClearArgs(); op = Opcode::Void; @@ -125,6 +141,12 @@ void Inst::ClearArgs() { } value = {}; } + for (auto& [phi_block, phi_op] : phi_operands) { + if (!phi_op.IsImmediate()) { + UndoUse(phi_op); + } + } + phi_operands.clear(); } void Inst::ReplaceUsesWith(Value replacement) { |