aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorbunnei <bunneidev@gmail.com>2022-08-07 18:47:57 -0700
committerGitHub <noreply@github.com>2022-08-07 18:47:57 -0700
commitb1d61cd02534a421feee75fd2a1c2e6dea8e54b0 (patch)
tree56d77a60abfade92265cfc0cbf0ec1caf813379e /src
parent01bb5d5c4d10424145739e4dd50c0a92547ca240 (diff)
parentaae208d07fb70d01766a01c76acc41bb2bb1e2bc (diff)
Merge pull request #8734 from liamwhite/bors-is-my-best-friend
core/arm: fix build error
Diffstat (limited to 'src')
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_32.cpp6
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_64.cpp6
2 files changed, 10 insertions, 2 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index 2e0e16b6e7..1638bc41db 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -144,7 +144,7 @@ public:
u64 GetTicksRemaining() override {
if (parent.uses_wall_clock) {
- if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
+ if (!IsInterrupted()) {
return minimum_run_cycles;
}
return 0U;
@@ -174,6 +174,10 @@ public:
parent.jit.load()->HaltExecution(hr);
}
+ bool IsInterrupted() {
+ return parent.system.Kernel().PhysicalCore(parent.core_index).IsInterrupted();
+ }
+
ARM_Dynarmic_32& parent;
Core::Memory::Memory& memory;
std::size_t num_interpreted_instructions{};
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index bf971b7dcb..921a5a7341 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -183,7 +183,7 @@ public:
u64 GetTicksRemaining() override {
if (parent.uses_wall_clock) {
- if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
+ if (!IsInterrupted()) {
return minimum_run_cycles;
}
return 0U;
@@ -217,6 +217,10 @@ public:
parent.jit.load()->HaltExecution(hr);
}
+ bool IsInterrupted() {
+ return parent.system.Kernel().PhysicalCore(parent.core_index).IsInterrupted();
+ }
+
ARM_Dynarmic_64& parent;
Core::Memory::Memory& memory;
u64 tpidrro_el0 = 0;