diff options
| author | Mathew Maidment <mathew1800@gmail.com> | 2015-12-28 09:59:39 -0500 |
|---|---|---|
| committer | Mathew Maidment <mathew1800@gmail.com> | 2015-12-28 09:59:39 -0500 |
| commit | 23f5d5a7761aaaeadbe942d22ddb316f18ca9037 (patch) | |
| tree | cec69dcfe3dcc086cede0b3b6ae2eda6c08e08f0 /src | |
| parent | 8f39297c5300b792abef2aaf7b7a4c14988ed4f8 (diff) | |
| parent | fddfe946c882a4a9c6cee9cf7ab170553f473960 (diff) | |
Merge pull request #1301 from lioncash/mrc-apsr
dyncom: Handle modifying the APSR via an MRC instruction
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 459877eaee..87b2b715bc 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -4696,18 +4696,15 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { mrc_inst* inst_cream = (mrc_inst*)inst_base->component; - unsigned int inst = inst_cream->inst; - if (inst_cream->Rd == 15) { - DEBUG_MSG; - } - if (inst_cream->inst == 0xeef04a10) { - // Undefined instruction fmrx - RD = 0x20000000; - CITRA_IGNORE_EXIT(-1); - goto END; - } else { - if (inst_cream->cp_num == 15) - RD = cpu->ReadCP15Register(CRn, OPCODE_1, CRm, OPCODE_2); + if (inst_cream->cp_num == 15) { + const uint32_t value = cpu->ReadCP15Register(CRn, OPCODE_1, CRm, OPCODE_2); + + if (inst_cream->Rd == 15) { + cpu->Cpsr = (cpu->Cpsr & ~0xF0000000) | (value & 0xF0000000); + LOAD_NZCVT; + } else { + RD = value; + } } } cpu->Reg[15] += cpu->GetInstructionSize(); |