diff options
| author | Kelebek1 <eeeedddccc@hotmail.co.uk> | 2022-08-12 10:58:09 +0100 |
|---|---|---|
| committer | Kelebek1 <eeeedddccc@hotmail.co.uk> | 2022-10-07 14:13:45 +0100 |
| commit | 752659aef3f16111981a097989dd7a5ddecff316 (patch) | |
| tree | 775fbe8d1a478b2b8c201d86432743d4f3ddb2a4 /src/video_core/shader_cache.cpp | |
| parent | 61883d8820c057259c6c6113934a44f69742164c (diff) | |
Update 3D regs
Diffstat (limited to 'src/video_core/shader_cache.cpp')
| -rw-r--r-- | src/video_core/shader_cache.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/video_core/shader_cache.cpp b/src/video_core/shader_cache.cpp index f530665794..d9482371bc 100644 --- a/src/video_core/shader_cache.cpp +++ b/src/video_core/shader_cache.cpp @@ -43,14 +43,14 @@ bool ShaderCache::RefreshStages(std::array<u64, 6>& unique_hashes) { } dirty[VideoCommon::Dirty::Shaders] = false; - const GPUVAddr base_addr{maxwell3d->regs.code_address.CodeAddress()}; + const GPUVAddr base_addr{maxwell3d->regs.program_region.Address()}; for (size_t index = 0; index < Tegra::Engines::Maxwell3D::Regs::MaxShaderProgram; ++index) { if (!maxwell3d->regs.IsShaderConfigEnabled(index)) { unique_hashes[index] = 0; continue; } - const auto& shader_config{maxwell3d->regs.shader_config[index]}; - const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderProgram>(index)}; + const auto& shader_config{maxwell3d->regs.pipelines[index]}; + const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderType>(index)}; const GPUVAddr shader_addr{base_addr + shader_config.offset}; const std::optional<VAddr> cpu_shader_addr{gpu_memory->GpuToCpuAddress(shader_addr)}; if (!cpu_shader_addr) { @@ -90,14 +90,14 @@ const ShaderInfo* ShaderCache::ComputeShader() { void ShaderCache::GetGraphicsEnvironments(GraphicsEnvironments& result, const std::array<u64, NUM_PROGRAMS>& unique_hashes) { size_t env_index{}; - const GPUVAddr base_addr{maxwell3d->regs.code_address.CodeAddress()}; + const GPUVAddr base_addr{maxwell3d->regs.program_region.Address()}; for (size_t index = 0; index < NUM_PROGRAMS; ++index) { if (unique_hashes[index] == 0) { continue; } - const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderProgram>(index)}; + const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderType>(index)}; auto& env{result.envs[index]}; - const u32 start_address{maxwell3d->regs.shader_config[index].offset}; + const u32 start_address{maxwell3d->regs.pipelines[index].offset}; env = GraphicsEnvironment{*maxwell3d, *gpu_memory, program, base_addr, start_address}; env.SetCachedSize(shader_infos[index]->size_bytes); result.env_ptrs[env_index++] = &env; |