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authorReinUsesLisp <reinuseslisp@airmail.cc>2021-05-23 04:28:34 -0300
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-22 21:51:30 -0400
commitd621e96d0de212cc16897eadf71e8a1b2e1eb5dc (patch)
tree8695f2f4dddf2564b63e4574d6616ccb0e79568c /src/shader_recompiler/frontend/maxwell/translate/impl
parent850b08a16cecf260e7c8e07b81b5e0078622974d (diff)
shader: Initial OpenGL implementation
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/translate/impl')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index b0baff74be..01fb6f5e52 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -120,6 +120,13 @@ enum class SpecialRegister : u64 {
case SpecialRegister::SR_INVOCATION_INFO:
// LOG_WARNING(..., "SR_INVOCATION_INFO is stubbed");
return ir.Imm32(0x00ff'0000);
+ case SpecialRegister::SR_TID: {
+ const IR::Value tid{ir.LocalInvocationId()};
+ return ir.BitFieldInsert(ir.BitFieldInsert(IR::U32{ir.CompositeExtract(tid, 0)},
+ IR::U32{ir.CompositeExtract(tid, 1)},
+ ir.Imm32(16), ir.Imm32(8)),
+ IR::U32{ir.CompositeExtract(tid, 2)}, ir.Imm32(26), ir.Imm32(6));
+ }
case SpecialRegister::SR_TID_X:
return ir.LocalInvocationIdX();
case SpecialRegister::SR_TID_Y: