diff options
author | FernandoS27 <fsahmkow27@gmail.com> | 2021-03-24 00:02:30 +0100 |
---|---|---|
committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-22 21:51:24 -0400 |
commit | 8cb9443cb99c4510e6ef26a91d09a31a8fa6281f (patch) | |
tree | 2337f294c7179e1e2e98cafedde5c2eb254965cb /src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp | |
parent | 68a9505d8a1d00c6ba2739bc0af3069cf87b9b84 (diff) |
shader: Fix F2I
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp')
-rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp index 758a0230a1..9bae89c109 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp @@ -21,6 +21,13 @@ IR::U32 TranslatorVisitor::X(IR::Reg reg) { return ir.GetReg(reg); } +IR::U64 TranslatorVisitor::L(IR::Reg reg) { + if (!IR::IsAligned(reg, 2)) { + throw NotImplementedException("Unaligned source register {}", reg); + } + return IR::U64{ir.PackUint2x32(ir.CompositeConstruct(X(reg), X(reg + 1)))}; +} + IR::F32 TranslatorVisitor::F(IR::Reg reg) { return ir.BitCast<IR::F32>(X(reg)); } @@ -36,6 +43,16 @@ void TranslatorVisitor::X(IR::Reg dest_reg, const IR::U32& value) { ir.SetReg(dest_reg, value); } +void TranslatorVisitor::L(IR::Reg dest_reg, const IR::U64& value) { + if (!IR::IsAligned(dest_reg, 2)) { + throw NotImplementedException("Unaligned destination register {}", dest_reg); + } + const IR::Value result{ir.UnpackUint2x32(value)}; + for (int i = 0; i < 2; i++) { + X(dest_reg + i, IR::U32{ir.CompositeExtract(result, i)}); + } +} + void TranslatorVisitor::F(IR::Reg dest_reg, const IR::F32& value) { X(dest_reg, ir.BitCast<IR::U32>(value)); } |