diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-04-21 00:27:55 -0300 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-22 21:51:28 -0400 |
| commit | 420982864634a5e52cea42c43f8623f75483fbcc (patch) | |
| tree | 5433936232c2819713e69581641ce271c4e0e68f /src/shader_recompiler/frontend/ir | |
| parent | 6944cabb899c4367a63cde97ae2bc2eb1a0fb790 (diff) | |
shader: Intrusively store register values in block for SSA pass
Diffstat (limited to 'src/shader_recompiler/frontend/ir')
| -rw-r--r-- | src/shader_recompiler/frontend/ir/basic_block.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/basic_block.h b/src/shader_recompiler/frontend/ir/basic_block.h index 6a1d615d92..3a42307557 100644 --- a/src/shader_recompiler/frontend/ir/basic_block.h +++ b/src/shader_recompiler/frontend/ir/basic_block.h @@ -101,6 +101,13 @@ public: return branch_false; } + void SetSsaRegValue(IR::Reg reg, const Value& value) noexcept { + ssa_reg_values[RegIndex(reg)] = value; + } + const Value& SsaRegValue(IR::Reg reg) const noexcept { + return ssa_reg_values[RegIndex(reg)]; + } + [[nodiscard]] bool empty() const { return instructions.empty(); } @@ -182,6 +189,9 @@ private: /// Block immediate predecessors std::vector<Block*> imm_predecessors; + /// Intrusively store the value of a register in the block. + std::array<Value, NUM_REGS> ssa_reg_values; + /// Intrusively stored host definition of this block. u32 definition{}; }; |