diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-07-25 21:27:21 -0300 |
|---|---|---|
| committer | Fernando Sahmkow <fsahmkow27@gmail.com> | 2021-11-16 22:11:28 +0100 |
| commit | 95761cc6a70987b2625d68c4d9da4e2622f57808 (patch) | |
| tree | 6bb64646fe8a4bc2741d260526be61b8f954dce2 /src/shader_recompiler/backend/spirv | |
| parent | 43aa695a0415821e42fabf78a8a624edaadebab7 (diff) | |
shader: Add integer division opcodes
Diffstat (limited to 'src/shader_recompiler/backend/spirv')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | 2 | ||||
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h index 3d90b2286b..44eda16ca0 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h @@ -284,6 +284,8 @@ Id EmitIAdd64(EmitContext& ctx, Id a, Id b); Id EmitISub32(EmitContext& ctx, Id a, Id b); Id EmitISub64(EmitContext& ctx, Id a, Id b); Id EmitIMul32(EmitContext& ctx, Id a, Id b); +Id EmitSDiv32(EmitContext& ctx, Id a, Id b); +Id EmitUDiv32(EmitContext& ctx, Id a, Id b); Id EmitINeg32(EmitContext& ctx, Id value); Id EmitINeg64(EmitContext& ctx, Id value); Id EmitIAbs32(EmitContext& ctx, Id value); diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index 3501d74953..50277eec37 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp @@ -72,6 +72,14 @@ Id EmitIMul32(EmitContext& ctx, Id a, Id b) { return ctx.OpIMul(ctx.U32[1], a, b); } +Id EmitSDiv32(EmitContext& ctx, Id a, Id b) { + return ctx.OpSDiv(ctx.U32[1], a, b); +} + +Id EmitUDiv32(EmitContext& ctx, Id a, Id b) { + return ctx.OpUDiv(ctx.U32[1], a, b); +} + Id EmitINeg32(EmitContext& ctx, Id value) { return ctx.OpSNegate(ctx.U32[1], value); } |