diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-02-21 23:42:38 -0300 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-22 21:51:22 -0400 |
| commit | 274897dfd59b4d08029ab7e93be4f84654abcdc8 (patch) | |
| tree | 083336a4d665476a87b888368878a311a7edab2a /src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp | |
| parent | 704c6f353f68745168902c6c66c04bb730bd30e6 (diff) | |
spirv: Fixes and Intel specific workarounds
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp index c5a07252f1..bb434def2e 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp @@ -6,20 +6,20 @@ namespace Shader::Backend::SPIRV { -void EmitLogicalOr(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitLogicalOr(EmitContext& ctx, Id a, Id b) { + return ctx.OpLogicalOr(ctx.U1, a, b); } -void EmitLogicalAnd(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b) { + return ctx.OpLogicalAnd(ctx.U1, a, b); } -void EmitLogicalXor(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitLogicalXor(EmitContext& ctx, Id a, Id b) { + return ctx.OpLogicalNotEqual(ctx.U1, a, b); } -void EmitLogicalNot(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitLogicalNot(EmitContext& ctx, Id value) { + return ctx.OpLogicalNot(ctx.U1, value); } } // namespace Shader::Backend::SPIRV |