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authorameerj <52414509+ameerj@users.noreply.github.com>2021-02-26 21:41:46 -0500
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-22 21:51:22 -0400
commita8c41c50d3f7a1c2871487862f68925db8b5e27f (patch)
tree06c37fb9cb9071b9fdeea4a61518d4b1e11a5968 /src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
parentcc55d289494c991e7e0e456e428a110569708c2e (diff)
shader: Implement POPC
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 406df1b78a..e49ca7bde0 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -106,6 +106,14 @@ Id EmitBitReverse32(EmitContext& ctx, Id value) {
return ctx.OpBitReverse(ctx.U32[1], value);
}
+Id EmitBitCount32(EmitContext& ctx, Id value) {
+ return ctx.OpBitCount(ctx.U32[1], value);
+}
+
+Id EmitBitwiseNot32(EmitContext& ctx, Id a) {
+ return ctx.OpNot(ctx.U32[1], a);
+}
+
Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) {
return ctx.OpSLessThan(ctx.U1, lhs, rhs);
}