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authorameerj <52414509+ameerj@users.noreply.github.com>2021-03-05 01:15:16 -0500
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-22 21:51:23 -0400
commit5465cb156107a27df525dfedbfd4e920b7f71253 (patch)
tree3bc5940f90e31e09820af69cd845eef92a7d7201 /src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
parentd1edc16ba87f3247ad220042050bfea2999067ff (diff)
shader: Implement LEA
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 162fb6a912..f5001cdaa1 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -62,6 +62,10 @@ Id EmitINeg32(EmitContext& ctx, Id value) {
return ctx.OpSNegate(ctx.U32[1], value);
}
+Id EmitINeg64(EmitContext& ctx, Id value) {
+ return ctx.OpSNegate(ctx.U64, value);
+}
+
Id EmitIAbs32(EmitContext& ctx, Id value) {
return ctx.OpSAbs(ctx.U32[1], value);
}
@@ -74,6 +78,10 @@ Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b) {
return ctx.OpShiftRightLogical(ctx.U32[1], a, b);
}
+Id EmitShiftRightLogical64(EmitContext& ctx, Id a, Id b) {
+ return ctx.OpShiftRightLogical(ctx.U64, a, b);
+}
+
Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b) {
return ctx.OpShiftRightArithmetic(ctx.U32[1], a, b);
}