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| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-05-10 19:20:15 -0300 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-22 21:51:31 -0400 |
| commit | 70fbede213bfadfc4015b3227e57fca34bea46eb (patch) | |
| tree | 72a860110d4228ba5a9bc6ca977b0fed55385d77 /src/shader_recompiler/backend/glasm/emit_glasm_select.cpp | |
| parent | c4fd6b55bc9acd06b2fc89f84fd175d78e14110a (diff) | |
glasm: Review all GLASM insts to be aware of register aliasing
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_select.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_select.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_select.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_select.cpp index cfde860479..b9e5cbbbec 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_select.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_select.cpp @@ -43,7 +43,7 @@ void EmitSelectU64(EmitContext& ctx, IR::Inst& inst, ScalarS32 cond, Register tr cond, ret, true_value); } else { ctx.Add("MOV.S.CC RC.x,{};" - "MOV.U64 {}.x(EQ.x),{};" + "MOV.U64 {}.x,{};" "MOV.U64 {}.x(NE.x),{};", cond, ret, false_value, ret, true_value); } |