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authorGareth Poole <510razor@gmail.com>2015-10-09 17:09:52 -0400
committerGareth Poole <510razor@gmail.com>2015-10-09 17:09:52 -0400
commitbe217bca7038fcca69e9e40fb481f0c7453b19fc (patch)
tree7a9692835a970c9da25acefb108fe6d5613aabaf /src/core/memory.cpp
parent7c747c8c3303458027e7531cb8f50bbd46fc9c1a (diff)
Fixed spelling errors
Diffstat (limited to 'src/core/memory.cpp')
-rw-r--r--src/core/memory.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/core/memory.cpp b/src/core/memory.cpp
index b80795e0c0..fc79c3ee96 100644
--- a/src/core/memory.cpp
+++ b/src/core/memory.cpp
@@ -26,9 +26,9 @@ enum class PageType {
};
/**
- * A (reasonably) fast way of allowing switchable and remmapable process address spaces. It loosely
+ * A (reasonably) fast way of allowing switchable and remappable process address spaces. It loosely
* mimics the way a real CPU page table works, but instead is optimized for minimal decoding and
- * fetching requirements when acessing. In the usual case of an access to regular memory, it only
+ * fetching requirements when accessing. In the usual case of an access to regular memory, it only
* requires an indexed fetch and a check for NULL.
*/
struct PageTable {