diff options
| author | Liam <byteslice@airmail.cc> | 2022-05-31 14:37:37 -0400 |
|---|---|---|
| committer | Liam <byteslice@airmail.cc> | 2022-06-01 02:15:15 -0400 |
| commit | 989d4a7a41f449af0ea09e34bee331a3a3ac8170 (patch) | |
| tree | df24bd9d7e6942b939e3ea42d08c0d65006e539f /src/core/arm/arm_interface.h | |
| parent | fb4b3c127f7c390358d7f4cadd2f58de116fec48 (diff) | |
core/debugger: Improved stepping mechanism and misc fixes
Diffstat (limited to 'src/core/arm/arm_interface.h')
| -rw-r--r-- | src/core/arm/arm_interface.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 7842c626bb..66f6107e9f 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -6,6 +6,9 @@ #include <array> #include <vector> + +#include <dynarmic/interface/halt_reason.h> + #include "common/common_funcs.h" #include "common/common_types.h" #include "core/hardware_properties.h" @@ -64,7 +67,7 @@ public: static_assert(sizeof(ThreadContext64) == 0x320); /// Runs the CPU until an event happens - virtual void Run() = 0; + void Run(); /// Clear all instruction cache virtual void ClearInstructionCache() = 0; @@ -191,7 +194,10 @@ public: void LogBacktrace() const; - bool ShouldStep() const; + static constexpr Dynarmic::HaltReason step_thread = Dynarmic::HaltReason::Step; + static constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2; + static constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3; + static constexpr Dynarmic::HaltReason breakpoint = Dynarmic::HaltReason::UserDefined4; protected: /// System context that this ARM interface is running under. @@ -200,6 +206,10 @@ protected: bool uses_wall_clock; static void SymbolicateBacktrace(Core::System& system, std::vector<BacktraceEntry>& out); + + virtual Dynarmic::HaltReason RunJit() = 0; + virtual Dynarmic::HaltReason StepJit() = 0; + virtual u32 GetSvcNumber() const = 0; }; } // namespace Core |