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authorLioncash <mathew1800@gmail.com>2018-08-28 10:57:56 -0400
committerLioncash <mathew1800@gmail.com>2018-08-28 11:11:50 -0400
commit45fb74d2623182b38af422bc6c8a51040860143f (patch)
treead65e21b3984d876241fc478d7624abfceb55e86
parentffe2336136dc683b8d97a355c2446aad2aaa5905 (diff)
gpu: Make memory_manager private
Makes the class interface consistent and provides accessors for obtaining a reference to the memory manager instance. Given we also return references, this makes our more flimsy uses of const apparent, given const doesn't propagate through pointers in the way one would typically expect. This makes our mutable state more apparent in some places.
Diffstat
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp12
-rw-r--r--src/core/memory.cpp4
-rw-r--r--src/video_core/gpu.cpp14
-rw-r--r--src/video_core/gpu.h12
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.cpp4
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer_cache.cpp16
-rw-r--r--src/yuzu/debugger/graphics/graphics_surface.cpp4
7 files changed, 40 insertions, 26 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp
index be2b792566..75487c4e80 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp
@@ -56,9 +56,9 @@ u32 nvhost_as_gpu::AllocateSpace(const std::vector<u8>& input, std::vector<u8>&
auto& gpu = Core::System::GetInstance().GPU();
const u64 size{static_cast<u64>(params.pages) * static_cast<u64>(params.page_size)};
if (params.flags & 1) {
- params.offset = gpu.memory_manager->AllocateSpace(params.offset, size, 1);
+ params.offset = gpu.MemoryManager().AllocateSpace(params.offset, size, 1);
} else {
- params.offset = gpu.memory_manager->AllocateSpace(size, params.align);
+ params.offset = gpu.MemoryManager().AllocateSpace(size, params.align);
}
std::memcpy(output.data(), &params, output.size());
@@ -88,7 +88,7 @@ u32 nvhost_as_gpu::Remap(const std::vector<u8>& input, std::vector<u8>& output)
u64 size = static_cast<u64>(entry.pages) << 0x10;
ASSERT(size <= object->size);
- Tegra::GPUVAddr returned = gpu.memory_manager->MapBufferEx(object->addr, offset, size);
+ Tegra::GPUVAddr returned = gpu.MemoryManager().MapBufferEx(object->addr, offset, size);
ASSERT(returned == offset);
}
std::memcpy(output.data(), entries.data(), output.size());
@@ -125,9 +125,9 @@ u32 nvhost_as_gpu::MapBufferEx(const std::vector<u8>& input, std::vector<u8>& ou
auto& gpu = Core::System::GetInstance().GPU();
if (params.flags & 1) {
- params.offset = gpu.memory_manager->MapBufferEx(object->addr, params.offset, object->size);
+ params.offset = gpu.MemoryManager().MapBufferEx(object->addr, params.offset, object->size);
} else {
- params.offset = gpu.memory_manager->MapBufferEx(object->addr, object->size);
+ params.offset = gpu.MemoryManager().MapBufferEx(object->addr, object->size);
}
// Create a new mapping entry for this operation.
@@ -161,7 +161,7 @@ u32 nvhost_as_gpu::UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& ou
itr->second.size);
auto& gpu = system_instance.GPU();
- params.offset = gpu.memory_manager->UnmapBuffer(params.offset, itr->second.size);
+ params.offset = gpu.MemoryManager().UnmapBuffer(params.offset, itr->second.size);
buffer_mappings.erase(itr->second.offset);
diff --git a/src/core/memory.cpp b/src/core/memory.cpp
index 1133bcbaf0..bc34bfd6d3 100644
--- a/src/core/memory.cpp
+++ b/src/core/memory.cpp
@@ -264,7 +264,7 @@ void RasterizerMarkRegionCached(Tegra::GPUVAddr gpu_addr, u64 size, bool cached)
u64 num_pages = ((gpu_addr + size - 1) >> PAGE_BITS) - (gpu_addr >> PAGE_BITS) + 1;
for (unsigned i = 0; i < num_pages; ++i, gpu_addr += PAGE_SIZE) {
boost::optional<VAddr> maybe_vaddr =
- Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(gpu_addr);
+ Core::System::GetInstance().GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
// The GPU <-> CPU virtual memory mapping is not 1:1
if (!maybe_vaddr) {
LOG_ERROR(HW_Memory,
@@ -346,7 +346,7 @@ void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode) {
const VAddr overlap_end = std::min(end, region_end);
const std::vector<Tegra::GPUVAddr> gpu_addresses =
- system_instance.GPU().memory_manager->CpuToGpuAddress(overlap_start);
+ system_instance.GPU().MemoryManager().CpuToGpuAddress(overlap_start);
if (gpu_addresses.empty()) {
return;
diff --git a/src/video_core/gpu.cpp b/src/video_core/gpu.cpp
index 9758adcfd7..e6d8e65c61 100644
--- a/src/video_core/gpu.cpp
+++ b/src/video_core/gpu.cpp
@@ -22,7 +22,7 @@ u32 FramebufferConfig::BytesPerPixel(PixelFormat format) {
}
GPU::GPU(VideoCore::RasterizerInterface& rasterizer) {
- memory_manager = std::make_unique<MemoryManager>();
+ memory_manager = std::make_unique<Tegra::MemoryManager>();
maxwell_3d = std::make_unique<Engines::Maxwell3D>(rasterizer, *memory_manager);
fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
@@ -31,14 +31,22 @@ GPU::GPU(VideoCore::RasterizerInterface& rasterizer) {
GPU::~GPU() = default;
-const Engines::Maxwell3D& GPU::Maxwell3D() const {
+Engines::Maxwell3D& GPU::Maxwell3D() {
return *maxwell_3d;
}
-Engines::Maxwell3D& GPU::Maxwell3D() {
+const Engines::Maxwell3D& GPU::Maxwell3D() const {
return *maxwell_3d;
}
+MemoryManager& GPU::MemoryManager() {
+ return *memory_manager;
+}
+
+const MemoryManager& GPU::MemoryManager() const {
+ return *memory_manager;
+}
+
u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
ASSERT(format != RenderTargetFormat::NONE);
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h
index 2697e1c278..2c3dbd97b5 100644
--- a/src/video_core/gpu.h
+++ b/src/video_core/gpu.h
@@ -117,18 +117,24 @@ public:
/// Processes a command list stored at the specified address in GPU memory.
void ProcessCommandList(GPUVAddr address, u32 size);
+ /// Returns a reference to the Maxwell3D GPU engine.
+ Engines::Maxwell3D& Maxwell3D();
+
/// Returns a const reference to the Maxwell3D GPU engine.
const Engines::Maxwell3D& Maxwell3D() const;
- /// Returns a reference to the Maxwell3D GPU engine.
- Engines::Maxwell3D& Maxwell3D();
+ /// Returns a reference to the GPU memory manager.
+ Tegra::MemoryManager& MemoryManager();
- std::unique_ptr<MemoryManager> memory_manager;
+ /// Returns a const reference to the GPU memory manager.
+ const Tegra::MemoryManager& MemoryManager() const;
private:
/// Writes a single register in the engine bound to the specified subchannel
void WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params);
+ std::unique_ptr<Tegra::MemoryManager> memory_manager;
+
/// Mapping of command subchannels to their bound engine ids.
std::unordered_map<u32, EngineID> bound_engines;
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp
index 9951d8178b..fddfb2d83e 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.cpp
+++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp
@@ -425,8 +425,8 @@ std::tuple<u8*, GLintptr, GLintptr> RasterizerOpenGL::UploadMemory(u8* buffer_pt
std::tie(buffer_ptr, buffer_offset) = AlignBuffer(buffer_ptr, buffer_offset, alignment);
GLintptr uploaded_offset = buffer_offset;
- const auto& memory_manager = Core::System::GetInstance().GPU().memory_manager;
- const boost::optional<VAddr> cpu_addr{memory_manager->GpuToCpuAddress(gpu_addr)};
+ auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
+ const boost::optional<VAddr> cpu_addr{memory_manager.GpuToCpuAddress(gpu_addr)};
Memory::ReadBlock(*cpu_addr, buffer_ptr, size);
buffer_ptr += size;
diff --git a/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp b/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
index 65305000c6..d87f90a62e 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
+++ b/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
@@ -168,8 +168,8 @@ static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType
}
VAddr SurfaceParams::GetCpuAddr() const {
- const auto& gpu = Core::System::GetInstance().GPU();
- return *gpu.memory_manager->GpuToCpuAddress(addr);
+ auto& gpu = Core::System::GetInstance().GPU();
+ return *gpu.MemoryManager().GpuToCpuAddress(addr);
}
static bool IsPixelFormatASTC(PixelFormat format) {
@@ -220,14 +220,14 @@ void MortonCopy(u32 stride, u32 block_height, u32 height, std::vector<u8>& gl_bu
Tegra::GPUVAddr addr) {
constexpr u32 bytes_per_pixel = SurfaceParams::GetFormatBpp(format) / CHAR_BIT;
constexpr u32 gl_bytes_per_pixel = CachedSurface::GetGLBytesPerPixel(format);
- const auto& gpu = Core::System::GetInstance().GPU();
+ auto& gpu = Core::System::GetInstance().GPU();
if (morton_to_gl) {
// With the BCn formats (DXT and DXN), each 4x4 tile is swizzled instead of just individual
// pixel values.
const u32 tile_size{IsFormatBCn(format) ? 4U : 1U};
const std::vector<u8> data =
- Tegra::Texture::UnswizzleTexture(*gpu.memory_manager->GpuToCpuAddress(addr), tile_size,
+ Tegra::Texture::UnswizzleTexture(*gpu.MemoryManager().GpuToCpuAddress(addr), tile_size,
bytes_per_pixel, stride, height, block_height);
const size_t size_to_copy{std::min(gl_buffer.size(), data.size())};
gl_buffer.assign(data.begin(), data.begin() + size_to_copy);
@@ -237,7 +237,7 @@ void MortonCopy(u32 stride, u32 block_height, u32 height, std::vector<u8>& gl_bu
LOG_WARNING(Render_OpenGL, "need to use correct swizzle/GOB parameters!");
VideoCore::MortonCopyPixels128(
stride, height, bytes_per_pixel, gl_bytes_per_pixel,
- Memory::GetPointer(*gpu.memory_manager->GpuToCpuAddress(addr)), gl_buffer.data(),
+ Memory::GetPointer(*gpu.MemoryManager().GpuToCpuAddress(addr)), gl_buffer.data(),
morton_to_gl);
}
}
@@ -754,9 +754,9 @@ Surface RasterizerCacheOpenGL::GetSurface(const SurfaceParams& params, bool pres
return {};
}
- const auto& gpu = Core::System::GetInstance().GPU();
+ auto& gpu = Core::System::GetInstance().GPU();
// Don't try to create any entries in the cache if the address of the texture is invalid.
- if (gpu.memory_manager->GpuToCpuAddress(params.addr) == boost::none)
+ if (gpu.MemoryManager().GpuToCpuAddress(params.addr) == boost::none)
return {};
// Look up surface in the cache based on address
@@ -848,7 +848,7 @@ Surface RasterizerCacheOpenGL::RecreateSurface(const Surface& surface,
"reinterpretation but the texture is tiled.");
}
size_t remaining_size = new_params.SizeInBytes() - params.SizeInBytes();
- auto address = Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(
+ auto address = Core::System::GetInstance().GPU().MemoryManager().GpuToCpuAddress(
new_params.addr + params.SizeInBytes());
std::vector<u8> data(remaining_size);
Memory::ReadBlock(*address, data.data(), data.size());
diff --git a/src/yuzu/debugger/graphics/graphics_surface.cpp b/src/yuzu/debugger/graphics/graphics_surface.cpp
index 2b20cf5b96..7e37962d5a 100644
--- a/src/yuzu/debugger/graphics/graphics_surface.cpp
+++ b/src/yuzu/debugger/graphics/graphics_surface.cpp
@@ -382,7 +382,7 @@ void GraphicsSurfaceWidget::OnUpdate() {
// TODO: Implement a good way to visualize alpha components!
QImage decoded_image(surface_width, surface_height, QImage::Format_ARGB32);
- boost::optional<VAddr> address = gpu.memory_manager->GpuToCpuAddress(surface_address);
+ boost::optional<VAddr> address = gpu.MemoryManager().GpuToCpuAddress(surface_address);
// TODO(bunnei): Will not work with BCn formats that swizzle 4x4 tiles.
// Needs to be fixed if we plan to use this feature more, otherwise we may remove it.
@@ -443,7 +443,7 @@ void GraphicsSurfaceWidget::SaveSurface() {
pixmap->save(&file, "PNG");
} else if (selectedFilter == bin_filter) {
auto& gpu = Core::System::GetInstance().GPU();
- boost::optional<VAddr> address = gpu.memory_manager->GpuToCpuAddress(surface_address);
+ boost::optional<VAddr> address = gpu.MemoryManager().GpuToCpuAddress(surface_address);
const u8* buffer = Memory::GetPointer(*address);
ASSERT_MSG(buffer != nullptr, "Memory not accessible");
generated by cgit v1.2.3-70-g09d2 (git 2.49.0) at 2025-03-30 12:05:02 +0000