aboutsummaryrefslogtreecommitdiff
path: root/ARMeilleure/Decoders/OpCodeT16MemSp.cs
blob: a038b915b33f5327ed3632cdc1a70d0aabeff596 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
using ARMeilleure.State;

namespace ARMeilleure.Decoders
{
    class OpCodeT16MemSp : OpCodeT16, IOpCode32Mem
    {
        public int Rt { get; }
        public int Rn => RegisterAlias.Aarch32Sp;

        public bool WBack => false;
        public bool IsLoad { get; }
        public bool Index => true;
        public bool Add => true;

        public int Immediate { get; }

        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16MemSp(inst, address, opCode);

        public OpCodeT16MemSp(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
        {
            Rt = (opCode >> 8) & 7;

            IsLoad = ((opCode >> 11) & 1) != 0;

            Immediate = ((opCode >> 0) & 0xff) << 2;
        }
    }
}