| Age | Commit message (Expand) | Author |
|---|
| 2019-08-08 | Add a new JIT compiler for CPU code (#693) | gdkchan |
| 2019-07-08 | Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V... | LDj3SNuD |
| 2019-06-29 | Implement the remaining tests for Simd and Fp instructions of data processing... | LDj3SNuD |
| 2019-03-13 | Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. ... | LDj3SNuD |
| 2018-11-18 | Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V... | LDj3SNuD |
| 2018-11-01 | Add Flush-to-zero mode (input, output) to FP instructions (slow paths); updat... | LDj3SNuD |
| 2018-10-30 | Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) | Alex Barney |
| 2018-10-13 | Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_... | LDj3SNuD |
| 2018-09-17 | Fix/Add 1+12 [Saturating] [Rounded] Shift Right Narrow (imm.) Instructions; a... | LDj3SNuD |
