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path: root/ARMeilleure/Translation/EmitterContext.cs
AgeCommit message (Expand)Author
2022-01-21Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)gdkchan
2021-08-17Reduce JIT GC allocations (#2515)FICTURE7
2021-05-29Add multi-level function table (#2228)FICTURE7
2021-05-17Allow `LocalVariable` to be assigned more than once (#2288)FICTURE7
2021-02-22PPTC & Pool Enhancements. (#1968)LDj3SNuD
2020-12-07Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (...LDj3SNuD
2020-09-19Implement block placement (#1549)FICTURE7
2020-09-12Relax block ordering constraints (#1535)FICTURE7
2020-08-05Improve branch operations (#1442)Ficture Seven
2020-07-30 Implement inline memory load/store exclusive and ordered (#1413)gdkchan
2020-07-19Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)Valentin PONS
2020-06-16Add Profiled Persistent Translation Cache. (#769)LDj3SNuD
2020-05-13Remove CpuId IR instruction (#1227)gdkchan
2020-05-11Fix tailcall case in EmitterContext (#1235)Ficture Seven
2020-05-04Improve IRDumper (#1135)Ficture Seven
2020-03-18CodeGen Optimisations (LSRA and Translator) (#978)riperiperi
2020-03-12Use a Jump Table for direct and indirect calls/jumps, removing transitions to...riperiperi
2020-02-17Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931)gdkchan
2019-08-08Add a new JIT compiler for CPU code (#693)gdkchan