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path: root/ARMeilleure/Translation/Delegates.cs
AgeCommit message (Expand)Author
2022-09-20Fpsr and Fpcr freed. (#3701)1.1.279LDj3SNuD
2022-09-19Implemented in IR the managed methods of the ShlReg region of the SoftFallbac...1.1.273LDj3SNuD
2022-09-08Implemented in IR the managed methods of the Saturating region ... (#3665)1.1.252LDj3SNuD
2022-07-06Implement CPU FCVT Half <-> Double conversion variants (#3439)1.1.165gdkchan
2022-05-31Refactor CPU interface to allow the implementation of other CPU emulators (#3...1.1.134gdkchan
2022-02-18Enable CPU JIT cache invalidation (#2965)1.1.44gdkchan
2021-05-29Add multi-level function table (#2228)FICTURE7
2021-04-18Add inlined on translation call counting (#2190)FICTURE7
2021-02-22Implement VCNT instruction (#1963)mageven
2021-01-04CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" varian...LDj3SNuD
2020-12-16Clear JIT cache on exit (#1518)gdkchan
2020-12-07Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (...LDj3SNuD
2020-10-16Memory Read/Write Tracking using Region Handles (#1272)riperiperi
2020-08-08CPU: This PR fixes Fpscr, among other things. (#1433)LDj3SNuD
2020-07-30 Implement inline memory load/store exclusive and ordered (#1413)gdkchan
2020-06-16Add Profiled Persistent Translation Cache. (#769)LDj3SNuD