Age | Commit message (Expand) | Author |
2022-01-29 | Fix small precision error on CPU reciprocal estimate instructions (#3061)1.1.13 | gdkchan |
2022-01-21 | Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) | gdkchan |
2022-01-19 | Implement FCVTNS (Scalar GP) (#2953) | sharmander |
2022-01-16 | Fix return type mismatch on 32-bit titles (#3000) | gdkchan |
2022-01-04 | CPU - Implement FCVTMS (Vector) (#2937) | sharmander |
2021-12-19 | Implement CSDB instruction (#2927) | gdkchan |
2021-12-08 | Implement UHADD8 instruction (#2908) | Piyachet Kanda |
2021-09-29 | Use normal memory store path for DC ZVA (#2693) | riperiperi |
2021-09-14 | Refactor `PtcInfo` (#2625) | FICTURE7 |
2021-08-27 | Implement MSR instruction for A32 (#2585) | Mary |
2021-08-17 | Reduce JIT GC allocations (#2515) | FICTURE7 |
2021-06-23 | Implement VORN (register) Arm32 instruction (#2396) | gdkchan |
2021-05-29 | Add multi-level function table (#2228) | FICTURE7 |
2021-05-24 | POWER - Performance Optimizations With Extensive Ramifications (#2286) | riperiperi |
2021-05-24 | Improve accuracy of reciprocal step instructions (#2305) | gdkchan |
2021-05-20 | Use branch instead of tailcall for recursive calls (#2282) | FICTURE7 |
2021-05-20 | Add `BIC/ORR Vd.T, #imm` fast path (#2279) | FICTURE7 |
2021-05-13 | Fold constant offsets and group constant addresses (#2285) | gdkchan |
2021-04-18 | Add inlined on translation call counting (#2190) | FICTURE7 |
2021-04-02 | Improve `StoreToContext` emission (#2155) | FICTURE7 |
2021-03-25 | Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139) | LDj3SNuD |
2021-02-22 | Implement VCNT instruction (#1963) | mageven |
2021-02-17 | Fix memory tracking performance regression (#2026) | gdkchan |
2021-02-16 | Validate CPU virtual addresses on access (#1987) | gdkchan |
2021-01-28 | Lower precision of estimate instruction results to match Arm behavior (#1943) | gdkchan |
2021-01-26 | Implement PRFM (register variant) as NOP (#1956) | mageven |
2021-01-25 | Add VCLZ.* fast path (#1917) | FICTURE7 |
2021-01-20 | CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests... | LDj3SNuD |
2021-01-04 | CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" varian... | LDj3SNuD |
2020-12-17 | Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow... | LDj3SNuD |
2020-12-17 | PPTC Follow-up. (#1712) | LDj3SNuD |
2020-12-16 | CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) | sharmander |
2020-12-16 | Clear JIT cache on exit (#1518) | gdkchan |
2020-12-15 | CPU: Implement VFMA (Vector) (#1762) | sharmander |
2020-12-13 | Fix register read after write on STREX implementation (#1801) | gdkchan |
2020-12-07 | CPU: Implement VFNMA.F32 | F.64 (#1783) | sharmander |
2020-12-07 | Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (... | LDj3SNuD |
2020-12-03 | CPU: Implement VFNMS.F32/64 (#1758) | sharmander |
2020-11-18 | CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & F... | LDj3SNuD |
2020-10-16 | Memory Read/Write Tracking using Region Handles (#1272) | riperiperi |
2020-10-13 | Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths... | LDj3SNuD |
2020-09-22 | IPC refactor part 1: Use explicit separate threads to process requests (#1447) | gdkchan |
2020-09-19 | Fix host stack overflow caused by some recursive guest methods. (#1528) | LDj3SNuD |
2020-09-19 | Implement block placement (#1549) | FICTURE7 |
2020-09-07 | Do not emit StoreToContext before Return (#1537) | FICTURE7 |
2020-08-31 | Improve static branch prediction along fast path for memory accesses (#1484) | FICTURE7 |
2020-08-31 | CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492) | LDj3SNuD |
2020-08-13 | Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) | LDj3SNuD |
2020-08-08 | CPU: This PR fixes Fpscr, among other things. (#1433) | LDj3SNuD |
2020-08-05 | Improve branch operations (#1442) | Ficture Seven |