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Diffstat (limited to 'src/Ryujinx.Graphics.Shader/Translation/Transforms/ForcePreciseEnable.cs')
-rw-r--r--src/Ryujinx.Graphics.Shader/Translation/Transforms/ForcePreciseEnable.cs36
1 files changed, 36 insertions, 0 deletions
diff --git a/src/Ryujinx.Graphics.Shader/Translation/Transforms/ForcePreciseEnable.cs b/src/Ryujinx.Graphics.Shader/Translation/Transforms/ForcePreciseEnable.cs
new file mode 100644
index 00000000..6b7e1410
--- /dev/null
+++ b/src/Ryujinx.Graphics.Shader/Translation/Transforms/ForcePreciseEnable.cs
@@ -0,0 +1,36 @@
+using Ryujinx.Graphics.Shader.IntermediateRepresentation;
+using System.Collections.Generic;
+
+namespace Ryujinx.Graphics.Shader.Translation.Transforms
+{
+ class ForcePreciseEnable : ITransformPass
+ {
+ public static bool IsEnabled(IGpuAccessor gpuAccessor, ShaderStage stage, TargetLanguage targetLanguage, FeatureFlags usedFeatures)
+ {
+ return stage == ShaderStage.Fragment && gpuAccessor.QueryHostReducedPrecision();
+ }
+
+ public static LinkedListNode<INode> RunPass(TransformContext context, LinkedListNode<INode> node)
+ {
+ // There are some cases where a small bias is added to values to prevent division by zero.
+ // When operating with reduced precision, it is possible for this bias to get rounded to 0
+ // and cause a division by zero.
+ // To prevent that, we force those operations to be precise even if the host wants
+ // imprecise operations for performance.
+
+ Operation operation = (Operation)node.Value;
+
+ if (operation.Inst == (Instruction.FP32 | Instruction.Divide) &&
+ operation.GetSource(0).Type == OperandType.Constant &&
+ operation.GetSource(0).AsFloat() == 1f &&
+ operation.GetSource(1).AsgOp is Operation addOp &&
+ addOp.Inst == (Instruction.FP32 | Instruction.Add) &&
+ addOp.GetSource(1).Type == OperandType.Constant)
+ {
+ addOp.ForcePrecise = true;
+ }
+
+ return node;
+ }
+ }
+}