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authorTSRBerry <20988865+TSRBerry@users.noreply.github.com>2023-06-26 07:25:06 +0200
committerGitHub <noreply@github.com>2023-06-26 07:25:06 +0200
commitff53dcf5607a82ad38388502b4cf5cc8cca77733 (patch)
treeeef4e2781d078ca62eee5da4ace8ed3323914c4a /src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs
parent2de78a2d55a1306761788570ab192897299c55d8 (diff)
[ARMeilleure] Address dotnet-format issues (#5357)1.1.923
* dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Silence dotnet format IDE0060 warnings * Silence dotnet format IDE0052 warnings * Address or silence dotnet format IDE1006 warnings * Address or silence dotnet format CA2208 warnings * Address dotnet format CA1822 warnings * Address or silence dotnet format CA1069 warnings * Silence CA1806 and CA1834 issues * Address dotnet format CA1401 warnings * Fix new dotnet-format issues after rebase * Address review comments * Address dotnet format CA2208 warnings properly * Fix formatting for switch expressions * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Add previously silenced warnings back I have no clue how these disappeared * Revert formatting changes for OpCodeTable.cs * Enable formatting for a few cases again * Format if-blocks correctly * Enable formatting for a few more cases again * Fix inline comment alignment * Run dotnet format after rebase and remove unused usings - analyzers - style - whitespace * Disable 'prefer switch expression' rule * Add comments to disabled warnings * Remove a few unused parameters * Adjust namespaces * Simplify properties and array initialization, Use const when possible, Remove trailing commas * Start working on disabled warnings * Fix and silence a few dotnet-format warnings again * Address IDE0251 warnings * Address a few disabled IDE0060 warnings * Silence IDE0060 in .editorconfig * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * First dotnet format pass * Remove unnecessary formatting exclusion * Add unsafe dotnet format changes * Change visibility of JitSupportDarwin to internal
Diffstat (limited to 'src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs')
-rw-r--r--src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs18
1 files changed, 10 insertions, 8 deletions
diff --git a/src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs b/src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs
index 804d915c..568c0712 100644
--- a/src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs
@@ -1,11 +1,9 @@
-
using ARMeilleure.Decoders;
using ARMeilleure.IntermediateRepresentation;
using ARMeilleure.State;
using ARMeilleure.Translation;
using System;
using System.Diagnostics;
-
using static ARMeilleure.Instructions.InstEmitHelper;
using static ARMeilleure.Instructions.InstEmitSimdHelper;
using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
@@ -74,7 +72,10 @@ namespace ARMeilleure.Instructions
public static Operand EmitExtractScalar(ArmEmitterContext context, Operand target, int reg, bool doubleWidth)
{
int index = reg & (doubleWidth ? 1 : 3);
- if (index == 0) return target; // Element is already at index 0, so just return the vector directly.
+ if (index == 0)
+ {
+ return target; // Element is already at index 0, so just return the vector directly.
+ }
if (doubleWidth)
{
@@ -249,7 +250,7 @@ namespace ARMeilleure.Instructions
OpCode32SimdRegS op = (OpCode32SimdRegS)context.CurrOp;
inst |= ((op.Size & 1) != 0 ? Intrinsic.Arm64VDouble : Intrinsic.Arm64VFloat) | Intrinsic.Arm64V128;
- EmitScalarBinaryOpSimd32(context, (n, m) => context.AddIntrinsic(inst, n, m));
+ EmitScalarBinaryOpSimd32(context, (n, m) => context.AddIntrinsic(inst, n, m));
}
public static void EmitScalarTernaryOpSimd32(ArmEmitterContext context, Func3I scalarFunc)
@@ -336,16 +337,17 @@ namespace ARMeilleure.Instructions
CmpCondition.GreaterThanOrEqual => Intrinsic.Arm64FcmgeVz,
CmpCondition.LessThan => Intrinsic.Arm64FcmltVz,
CmpCondition.LessThanOrEqual => Intrinsic.Arm64FcmleVz,
- _ => throw new InvalidOperationException()
+ _ => throw new InvalidOperationException(),
};
}
- else {
+ else
+ {
inst = cond switch
{
CmpCondition.Equal => Intrinsic.Arm64FcmeqV,
CmpCondition.GreaterThan => Intrinsic.Arm64FcmgtV,
CmpCondition.GreaterThanOrEqual => Intrinsic.Arm64FcmgeV,
- _ => throw new InvalidOperationException()
+ _ => throw new InvalidOperationException(),
};
}
@@ -367,4 +369,4 @@ namespace ARMeilleure.Instructions
}
}
}
-} \ No newline at end of file
+}