diff options
| author | merry <git@mary.rs> | 2022-03-19 13:32:35 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-03-19 10:32:35 -0300 |
| commit | df70442c46e7ee133b1fb79dc23ddd134e618085 (patch) | |
| tree | 11ab8c5d2b9f8cf5e032854e99dc4212c76a93a3 /ARMeilleure/Instructions/InstEmitMemoryEx32.cs | |
| parent | e2ffa5a125fcbe8a25c73d8e04c08c08ef378860 (diff) | |
InstEmitMemoryEx: Barrier after write on ordered store (#3193)1.1.77
* InstEmitMemoryEx: Barrier after write on ordered store
* increment ptc version
* 32
Diffstat (limited to 'ARMeilleure/Instructions/InstEmitMemoryEx32.cs')
| -rw-r--r-- | ARMeilleure/Instructions/InstEmitMemoryEx32.cs | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/ARMeilleure/Instructions/InstEmitMemoryEx32.cs b/ARMeilleure/Instructions/InstEmitMemoryEx32.cs index 9a9787cf..c2326cde 100644 --- a/ARMeilleure/Instructions/InstEmitMemoryEx32.cs +++ b/ARMeilleure/Instructions/InstEmitMemoryEx32.cs @@ -146,13 +146,13 @@ namespace ARMeilleure.Instructions var exclusive = (accType & AccessType.Exclusive) != 0; var ordered = (accType & AccessType.Ordered) != 0; - if (ordered) - { - EmitBarrier(context); - } - if ((accType & AccessType.Load) != 0) { + if (ordered) + { + EmitBarrier(context); + } + if (size == DWordSizeLog2) { // Keep loads atomic - make the call to get the whole region and then decompose it into parts @@ -219,6 +219,11 @@ namespace ARMeilleure.Instructions Operand value = context.ZeroExtend32(OperandType.I64, GetIntA32(context, op.Rt)); EmitStoreExclusive(context, address, value, exclusive, size, op.Rd, a32: true); } + + if (ordered) + { + EmitBarrier(context); + } } } |