diff options
| author | merry <git@mary.rs> | 2022-02-17 22:39:45 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-17 19:39:45 -0300 |
| commit | 98e05ee4b7aa8a08088b1f0cd6c581bb50f11395 (patch) | |
| tree | af9cf98afb6c44161fadd87bfe7946c7a4250e47 /ARMeilleure/Instructions/InstEmitAlu32.cs | |
| parent | 868919e101ba5d5ad1cfccb5017b294fec11c6e3 (diff) | |
ARMeilleure: Thumb support (All T16 instructions) (#3105)1.1.36
* Decoders: Add InITBlock argument
* OpCodeTable: Minor cleanup
* OpCodeTable: Remove existing thumb instruction implementations
* OpCodeTable: Prepare for thumb instructions
* OpCodeTables: Improve thumb fast lookup
* Tests: Prepare for thumb tests
* T16: Implement BX
* T16: Implement LSL/LSR/ASR (imm)
* T16: Implement ADDS, SUBS (reg)
* T16: Implement ADDS, SUBS (3-bit immediate)
* T16: Implement MOVS, CMP, ADDS, SUBS (8-bit immediate)
* T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers)
* T16: Implement ADD, CMP, MOV (high reg)
* T16: Implement BLX (reg)
* T16: Implement LDR (literal)
* T16: Implement {LDR,STR}{,H,B,SB,SH} (register)
* T16: Implement {LDR,STR}{,B,H} (immediate)
* T16: Implement LDR/STR (SP)
* T16: Implement ADR
* T16: Implement Add to SP (immediate)
* T16: Implement ADD/SUB (SP)
* T16: Implement SXTH, SXTB, UXTH, UTXB
* T16: Implement CBZ, CBNZ
* T16: Implement PUSH, POP
* T16: Implement REV, REV16, REVSH
* T16: Implement NOP
* T16: Implement LDM, STM
* T16: Implement SVC
* T16: Implement B (conditional)
* T16: Implement B (unconditional)
* T16: Implement IT
* fixup! T16: Implement ADD/SUB (SP)
* fixup! T16: Implement Add to SP (immediate)
* fixup! T16: Implement IT
* CpuTestThumb: Add randomized tests
* Remove inITBlock argument
* Address nits
* Use index to handle IfThenBlockState
* Reduce line noise
* fixup
* nit
Diffstat (limited to 'ARMeilleure/Instructions/InstEmitAlu32.cs')
| -rw-r--r-- | ARMeilleure/Instructions/InstEmitAlu32.cs | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/ARMeilleure/Instructions/InstEmitAlu32.cs b/ARMeilleure/Instructions/InstEmitAlu32.cs index 66b8a8a7..1cbc0765 100644 --- a/ARMeilleure/Instructions/InstEmitAlu32.cs +++ b/ARMeilleure/Instructions/InstEmitAlu32.cs @@ -20,7 +20,7 @@ namespace ARMeilleure.Instructions Operand res = context.Add(n, m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); @@ -44,7 +44,7 @@ namespace ARMeilleure.Instructions res = context.Add(res, carry); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); @@ -64,7 +64,7 @@ namespace ARMeilleure.Instructions Operand res = context.BitwiseAnd(n, m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); } @@ -110,7 +110,7 @@ namespace ARMeilleure.Instructions Operand res = context.BitwiseAnd(n, context.BitwiseNot(m)); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); } @@ -161,7 +161,7 @@ namespace ARMeilleure.Instructions Operand res = context.BitwiseExclusiveOr(n, m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); } @@ -175,7 +175,7 @@ namespace ARMeilleure.Instructions Operand m = GetAluM(context); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, m); } @@ -204,7 +204,7 @@ namespace ARMeilleure.Instructions Operand res = context.Multiply(n, m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); } @@ -219,7 +219,7 @@ namespace ARMeilleure.Instructions Operand res = context.BitwiseNot(m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); } @@ -236,7 +236,7 @@ namespace ARMeilleure.Instructions Operand res = context.BitwiseOr(n, m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); } @@ -315,7 +315,7 @@ namespace ARMeilleure.Instructions res = context.Subtract(res, borrow); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); @@ -335,7 +335,7 @@ namespace ARMeilleure.Instructions Operand res = context.Subtract(m, n); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); @@ -359,7 +359,7 @@ namespace ARMeilleure.Instructions res = context.Subtract(res, borrow); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); @@ -420,7 +420,7 @@ namespace ARMeilleure.Instructions Operand res = context.Subtract(n, m); - if (op.SetFlags) + if (ShouldSetFlags(context)) { EmitNZFlagsCheck(context, res); @@ -836,7 +836,7 @@ namespace ARMeilleure.Instructions { IOpCode32Alu op = (IOpCode32Alu)context.CurrOp; - EmitGenericAluStoreA32(context, op.Rd, op.SetFlags, value); + EmitGenericAluStoreA32(context, op.Rd, ShouldSetFlags(context), value); } } } |