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| author | gdkchan <gab.dark.100@gmail.com> | 2022-09-09 22:09:11 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-09-09 22:09:11 -0300 |
| commit | c64524a240671cb3f8609e3454576e69e5948a60 (patch) | |
| tree | b02fe220963b33b4292adf7b4a5236dae6bc0b05 /ARMeilleure/Decoders/Decoder.cs | |
| parent | db45688aa8d0e63d3ffbe50351722ef32f8360f8 (diff) | |
Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683)1.1.256
* Add ADD (zx imm12), NOP, MOV (register shifted), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions, fix LDRD, STRD, CBZ, CBNZ and BLX (reg)
* Bump PPTC version
Diffstat (limited to 'ARMeilleure/Decoders/Decoder.cs')
| -rw-r--r-- | ARMeilleure/Decoders/Decoder.cs | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/ARMeilleure/Decoders/Decoder.cs b/ARMeilleure/Decoders/Decoder.cs index 4dd8742c..426465aa 100644 --- a/ARMeilleure/Decoders/Decoder.cs +++ b/ARMeilleure/Decoders/Decoder.cs @@ -251,6 +251,13 @@ namespace ARMeilleure.Decoders return false; } + // Compare and branch instructions are always conditional. + if (opCode.Instruction.Name == InstName.Cbz || + opCode.Instruction.Name == InstName.Cbnz) + { + return false; + } + // Note: On ARM32, most instructions have conditional execution, // so there's no "Always" (unconditional) branch like on ARM64. // We need to check if the condition is "Always" instead. |