From dcaf0e91508562a70a49db7011ad09f13f811d71 Mon Sep 17 00:00:00 2001
From: FernandoS27 <fsahmkow27@gmail.com>
Date: Mon, 5 Apr 2021 04:03:12 +0200
Subject: shader: Address feedback
---
src/shader_recompiler/frontend/ir/ir_emitter.cpp | 4 +--
src/shader_recompiler/frontend/ir/ir_emitter.h | 4 +--
.../translate/impl/load_store_attribute.cpp | 37 ++++++++++++----------
3 files changed, 25 insertions(+), 20 deletions(-)
(limited to 'src/shader_recompiler/frontend')
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index e4e9b260c7..13eb2de4c4 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -307,11 +307,11 @@ void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value) {
Inst(Opcode::SetAttribute, attribute, value);
}
-F32 IREmitter::GetAttributeIndexed(IR::U32 phys_address) {
+F32 IREmitter::GetAttributeIndexed(const U32& phys_address) {
return Inst<F32>(Opcode::GetAttributeIndexed, phys_address);
}
-void IREmitter::SetAttributeIndexed(IR::U32 phys_address, const F32& value) {
+void IREmitter::SetAttributeIndexed(const U32& phys_address, const F32& value) {
Inst(Opcode::SetAttributeIndexed, phys_address, value);
}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index afa8bd924f..2cab1dc5d7 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -76,8 +76,8 @@ public:
[[nodiscard]] F32 GetAttribute(IR::Attribute attribute);
void SetAttribute(IR::Attribute attribute, const F32& value);
- [[nodiscard]] F32 GetAttributeIndexed(IR::U32 phys_address);
- void SetAttributeIndexed(IR::U32 phys_address, const F32& value);
+ [[nodiscard]] F32 GetAttributeIndexed(const U32& phys_address);
+ void SetAttributeIndexed(const U32& phys_address, const F32& value);
void SetFragColor(u32 index, u32 component, const F32& value);
void SetFragDepth(const F32& value);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
index 0d248c0203..f629e71679 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
@@ -44,6 +44,17 @@ u32 NumElements(Size size) {
}
throw InvalidArgument("Invalid size {}", size);
}
+
+template <typename F>
+void HandleIndexed(TranslatorVisitor& v, IR::Reg index_reg, u32 num_elements, F&& f) {
+ const IR::U32 index_value{v.X(index_reg)};
+ for (u32 element = 0; element < num_elements; ++element) {
+ const IR::U32 final_offset{
+ element == 0 ? index_value : IR::U32{v.ir.IAdd(index_value, v.ir.Imm32(element * 4U))}};
+ f(element, final_offset);
+ }
+}
+
} // Anonymous namespace
void TranslatorVisitor::ALD(u64 insn) {
@@ -70,18 +81,15 @@ void TranslatorVisitor::ALD(u64 insn) {
throw NotImplementedException("Unaligned absolute offset {}", offset);
}
const u32 num_elements{NumElements(ald.size)};
- if (ald.index_reg != IR::Reg::RZ) {
- const IR::U32 index_value = X(ald.index_reg);
+ if (ald.index_reg == IR::Reg::RZ) {
for (u32 element = 0; element < num_elements; ++element) {
- const IR::U32 final_offset =
- element == 0 ? index_value : IR::U32{ir.IAdd(index_value, ir.Imm32(element * 4U))};
- F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset));
+ F(ald.dest_reg + element, ir.GetAttribute(IR::Attribute{offset / 4 + element}));
}
return;
}
- for (u32 element = 0; element < num_elements; ++element) {
- F(ald.dest_reg + element, ir.GetAttribute(IR::Attribute{offset / 4 + element}));
- }
+ HandleIndexed(*this, ald.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
+ F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset));
+ });
}
void TranslatorVisitor::AST(u64 insn) {
@@ -110,18 +118,15 @@ void TranslatorVisitor::AST(u64 insn) {
throw NotImplementedException("Unaligned absolute offset {}", offset);
}
const u32 num_elements{NumElements(ast.size)};
- if (ast.index_reg != IR::Reg::RZ) {
- const IR::U32 index_value = X(ast.index_reg);
+ if (ast.index_reg == IR::Reg::RZ) {
for (u32 element = 0; element < num_elements; ++element) {
- const IR::U32 final_offset =
- element == 0 ? index_value : IR::U32{ir.IAdd(index_value, ir.Imm32(element * 4U))};
- ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element));
+ ir.SetAttribute(IR::Attribute{offset / 4 + element}, F(ast.src_reg + element));
}
return;
}
- for (u32 element = 0; element < num_elements; ++element) {
- ir.SetAttribute(IR::Attribute{offset / 4 + element}, F(ast.src_reg + element));
- }
+ HandleIndexed(*this, ast.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
+ ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element));
+ });
}
void TranslatorVisitor::IPA(u64 insn) {
--
cgit v1.2.3-70-g09d2