From 5bfcafa0a21619e8cd82c38ec51e260838f42042 Mon Sep 17 00:00:00 2001
From: lat9nq <22451773+lat9nq@users.noreply.github.com>
Date: Sat, 10 Apr 2021 02:32:55 -0400
Subject: shader: Address feedback + clang format
---
src/shader_recompiler/frontend/ir/opcodes.cpp | 2 +-
src/shader_recompiler/frontend/maxwell/control_flow.cpp | 4 ++--
src/shader_recompiler/frontend/maxwell/control_flow.h | 16 ++++++++--------
src/shader_recompiler/frontend/maxwell/decode.cpp | 2 +-
.../frontend/maxwell/translate/impl/common_funcs.cpp | 5 +++--
.../frontend/maxwell/translate/impl/not_implemented.cpp | 1 -
6 files changed, 15 insertions(+), 15 deletions(-)
(limited to 'src/shader_recompiler/frontend')
diff --git a/src/shader_recompiler/frontend/ir/opcodes.cpp b/src/shader_recompiler/frontend/ir/opcodes.cpp
index 002dbf94e9..7d3e0b2ab5 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.cpp
+++ b/src/shader_recompiler/frontend/ir/opcodes.cpp
@@ -49,7 +49,7 @@ constexpr std::array META_TABLE{
#define OPCODE(name_token, type_token, ...) \
OpcodeMeta{ \
.name{#name_token}, \
- .type = type_token, \
+ .type = type_token, \
.arg_types{__VA_ARGS__}, \
},
#include "opcodes.inc"
diff --git a/src/shader_recompiler/frontend/maxwell/control_flow.cpp b/src/shader_recompiler/frontend/maxwell/control_flow.cpp
index cb8ec7eaa3..9811183f12 100644
--- a/src/shader_recompiler/frontend/maxwell/control_flow.cpp
+++ b/src/shader_recompiler/frontend/maxwell/control_flow.cpp
@@ -44,7 +44,7 @@ void Split(Block* old_block, Block* new_block, Location pc) {
*new_block = Block{};
new_block->begin = pc;
new_block->end = old_block->end;
- new_block->end_class = old_block->end_class,
+ new_block->end_class = old_block->end_class;
new_block->cond = old_block->cond;
new_block->stack = old_block->stack;
new_block->branch_true = old_block->branch_true;
@@ -428,7 +428,7 @@ CFG::AnalysisState CFG::AnalyzeBRX(Block* block, Location pc, Instruction inst,
if (!is_absolute) {
target += pc.Offset();
}
- target += static_cast<unsigned int>(brx_table->branch_offset);
+ target += static_cast<u32>(brx_table->branch_offset);
target += 8;
targets.push_back(target);
}
diff --git a/src/shader_recompiler/frontend/maxwell/control_flow.h b/src/shader_recompiler/frontend/maxwell/control_flow.h
index 9f570fbb50..89966b16aa 100644
--- a/src/shader_recompiler/frontend/maxwell/control_flow.h
+++ b/src/shader_recompiler/frontend/maxwell/control_flow.h
@@ -78,15 +78,15 @@ struct Block : boost::intrusive::set_base_hook<
Location begin;
Location end;
- EndClass end_class;
- IR::Condition cond;
+ EndClass end_class{};
+ IR::Condition cond{};
Stack stack;
- Block* branch_true;
- Block* branch_false;
- FunctionId function_call;
- Block* return_block;
- IR::Reg branch_reg;
- s32 branch_offset;
+ Block* branch_true{};
+ Block* branch_false{};
+ FunctionId function_call{};
+ Block* return_block{};
+ IR::Reg branch_reg{};
+ s32 branch_offset{};
std::vector<IndirectBranch> indirect_branches;
};
diff --git a/src/shader_recompiler/frontend/maxwell/decode.cpp b/src/shader_recompiler/frontend/maxwell/decode.cpp
index 932d19c1d4..972f677dc9 100644
--- a/src/shader_recompiler/frontend/maxwell/decode.cpp
+++ b/src/shader_recompiler/frontend/maxwell/decode.cpp
@@ -56,7 +56,7 @@ constexpr std::array UNORDERED_ENCODINGS{
#define INST(name, cute, encode) \
InstEncoding{ \
.mask_value{MaskValueFromEncoding(encode)}, \
- .opcode = Opcode::name, \
+ .opcode = Opcode::name, \
},
#include "maxwell.inc"
#undef INST
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.cpp
index d30e82b10e..10bb01d99d 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.cpp
@@ -72,8 +72,9 @@ bool IsCompareOpOrdered(FPCompareOp op) {
}
}
-IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F16F32F64& operand_1, const IR::F16F32F64& operand_2,
- FPCompareOp compare_op, IR::FpControl control) {
+IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F16F32F64& operand_1,
+ const IR::F16F32F64& operand_2, FPCompareOp compare_op,
+ IR::FpControl control) {
const bool ordered{IsCompareOpOrdered(compare_op)};
switch (compare_op) {
case FPCompareOp::F:
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
index ba0cfa673b..c239010527 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
@@ -65,7 +65,6 @@ void TranslatorVisitor::CS2R(u64) {
ThrowNotImplemented(Opcode::CS2R);
}
-
void TranslatorVisitor::FCHK_reg(u64) {
ThrowNotImplemented(Opcode::FCHK_reg);
}
--
cgit v1.2.3-70-g09d2