From 6c4cc0cd062fbbba5349da1108d3c23cb330ca8a Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Tue, 2 Feb 2021 21:07:00 -0300
Subject: shader: SSA and dominance
---
src/shader_recompiler/frontend/maxwell/termination_code.cpp | 7 +++++++
1 file changed, 7 insertions(+)
(limited to 'src/shader_recompiler/frontend/maxwell/termination_code.cpp')
diff --git a/src/shader_recompiler/frontend/maxwell/termination_code.cpp b/src/shader_recompiler/frontend/maxwell/termination_code.cpp
index a4ea5c5e38..ed5137f20c 100644
--- a/src/shader_recompiler/frontend/maxwell/termination_code.cpp
+++ b/src/shader_recompiler/frontend/maxwell/termination_code.cpp
@@ -47,12 +47,19 @@ static IR::U1 GetCond(IR::Condition cond, IR::IREmitter& ir) {
static void EmitBranch(const Flow::Block& flow_block, std::span<IR::Block* const> block_map,
IR::IREmitter& ir) {
+ const auto add_immediate_predecessor = [&](Flow::BlockId label) {
+ block_map[label]->AddImmediatePredecessor(&ir.block);
+ };
if (flow_block.cond == true) {
+ add_immediate_predecessor(flow_block.branch_true);
return ir.Branch(block_map[flow_block.branch_true]);
}
if (flow_block.cond == false) {
+ add_immediate_predecessor(flow_block.branch_false);
return ir.Branch(block_map[flow_block.branch_false]);
}
+ add_immediate_predecessor(flow_block.branch_true);
+ add_immediate_predecessor(flow_block.branch_false);
return ir.BranchConditional(GetCond(flow_block.cond, ir), block_map[flow_block.branch_true],
block_map[flow_block.branch_false]);
}
--
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