From 7d6ba5b9840a4ba00a9b0f207c1c119d60dcf8b7 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sun, 7 Mar 2021 22:01:22 -0500
Subject: shader: Implement R2P
---
src/shader_recompiler/frontend/ir/ir_emitter.cpp | 2 ++
src/shader_recompiler/frontend/ir/opcodes.inc | 1 +
2 files changed, 3 insertions(+)
(limited to 'src/shader_recompiler/frontend/ir')
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 1659b7f3b6..f38b46bace 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -412,6 +412,8 @@ Value IREmitter::Select(const U1& condition, const Value& true_value, const Valu
throw InvalidArgument("Mismatching types {} and {}", true_value.Type(), false_value.Type());
}
switch (true_value.Type()) {
+ case Type::U1:
+ return Inst(Opcode::SelectU1, condition, true_value, false_value);
case Type::U8:
return Inst(Opcode::SelectU8, condition, true_value, false_value);
case Type::U16:
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 75f09ebfcd..c4e72c84d9 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -115,6 +115,7 @@ OPCODE(CompositeInsertF64x3, F64x3, F64x
OPCODE(CompositeInsertF64x4, F64x4, F64x4, F64, U32, )
// Select operations
+OPCODE(SelectU1, U1, U1, U1, U1, )
OPCODE(SelectU8, U8, U1, U8, U8, )
OPCODE(SelectU16, U16, U1, U16, U16, )
OPCODE(SelectU32, U32, U1, U32, U32, )
--
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