From 16cb00c521cae6e93ec49d10e15b575b7bc4857e Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 5 Feb 2021 23:11:23 -0300
Subject: shader: Add pools and rename files
---
src/shader_recompiler/frontend/ir/program.cpp | 38 +++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 src/shader_recompiler/frontend/ir/program.cpp
(limited to 'src/shader_recompiler/frontend/ir/program.cpp')
diff --git a/src/shader_recompiler/frontend/ir/program.cpp b/src/shader_recompiler/frontend/ir/program.cpp
new file mode 100644
index 0000000000..0ce99ef2a9
--- /dev/null
+++ b/src/shader_recompiler/frontend/ir/program.cpp
@@ -0,0 +1,38 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include <map>
+#include <string>
+
+#include <fmt/format.h>
+
+#include "shader_recompiler/frontend/ir/function.h"
+#include "shader_recompiler/frontend/ir/program.h"
+
+namespace Shader::IR {
+
+std::string DumpProgram(const Program& program) {
+ size_t index{0};
+ std::map<const IR::Inst*, size_t> inst_to_index;
+ std::map<const IR::Block*, size_t> block_to_index;
+
+ for (const IR::Function& function : program.functions) {
+ for (const IR::Block* const block : function.blocks) {
+ block_to_index.emplace(block, index);
+ ++index;
+ }
+ }
+ std::string ret;
+ for (const IR::Function& function : program.functions) {
+ ret += fmt::format("Function\n");
+ for (const auto& block : function.blocks) {
+ ret += IR::DumpBlock(*block, block_to_index, inst_to_index, index) + '\n';
+ }
+ }
+ return ret;
+}
+
+} // namespace Shader::IR
\ No newline at end of file
--
cgit v1.2.3-70-g09d2
From 6db69990da9f232e6d982cdcb69c2e27d93075cf Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 19 Feb 2021 18:10:18 -0300
Subject: spirv: Add lower fp16 to fp32 pass
---
src/shader_recompiler/CMakeLists.txt | 2 +
.../backend/spirv/emit_context.cpp | 29 ++++--
src/shader_recompiler/backend/spirv/emit_context.h | 6 +-
src/shader_recompiler/backend/spirv/emit_spirv.cpp | 2 +
src/shader_recompiler/backend/spirv/emit_spirv.h | 103 +++++++++++----------
.../spirv/emit_spirv_bitwise_conversion.cpp | 28 ++++--
.../backend/spirv/emit_spirv_composite.cpp | 48 +++++-----
.../backend/spirv/emit_spirv_control_flow.cpp | 2 +-
.../backend/spirv/emit_spirv_convert.cpp | 89 ++++++++++++++++++
.../backend/spirv/emit_spirv_floating_point.cpp | 48 +++++-----
.../backend/spirv/emit_spirv_integer.cpp | 16 ----
.../backend/spirv/emit_spirv_logical.cpp | 72 +-------------
.../backend/spirv/emit_spirv_memory.cpp | 22 +++--
src/shader_recompiler/frontend/ir/condition.h | 2 +-
src/shader_recompiler/frontend/ir/ir_emitter.cpp | 70 +++++++-------
.../frontend/ir/microinstruction.cpp | 4 +
.../frontend/ir/microinstruction.h | 2 +
src/shader_recompiler/frontend/ir/opcodes.inc | 6 +-
src/shader_recompiler/frontend/ir/program.cpp | 2 +-
src/shader_recompiler/frontend/maxwell/program.cpp | 2 +
.../impl/floating_point_conversion_integer.cpp | 62 ++++++++++---
.../frontend/maxwell/translate/impl/impl.h | 2 +-
.../ir_opt/collect_shader_info_pass.cpp | 18 +++-
.../ir_opt/constant_propagation_pass.cpp | 12 +--
.../ir_opt/lower_fp16_to_fp32.cpp | 79 ++++++++++++++++
src/shader_recompiler/ir_opt/passes.h | 1 +
src/shader_recompiler/main.cpp | 10 +-
src/shader_recompiler/object_pool.h | 2 +-
src/video_core/renderer_vulkan/vk_compute_pass.cpp | 3 +
.../renderer_vulkan/vk_pipeline_cache.cpp | 8 +-
src/video_core/renderer_vulkan/vk_rasterizer.cpp | 2 -
src/video_core/vulkan_common/vulkan_device.cpp | 10 +-
32 files changed, 479 insertions(+), 285 deletions(-)
create mode 100644 src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp
create mode 100644 src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
(limited to 'src/shader_recompiler/frontend/ir/program.cpp')
diff --git a/src/shader_recompiler/CMakeLists.txt b/src/shader_recompiler/CMakeLists.txt
index b56bdd3d9c..6047f3ebeb 100644
--- a/src/shader_recompiler/CMakeLists.txt
+++ b/src/shader_recompiler/CMakeLists.txt
@@ -7,6 +7,7 @@ add_library(shader_recompiler STATIC
backend/spirv/emit_spirv_composite.cpp
backend/spirv/emit_spirv_context_get_set.cpp
backend/spirv/emit_spirv_control_flow.cpp
+ backend/spirv/emit_spirv_convert.cpp
backend/spirv/emit_spirv_floating_point.cpp
backend/spirv/emit_spirv_integer.cpp
backend/spirv/emit_spirv_logical.cpp
@@ -82,6 +83,7 @@ add_library(shader_recompiler STATIC
ir_opt/dead_code_elimination_pass.cpp
ir_opt/global_memory_to_storage_buffer_pass.cpp
ir_opt/identity_removal_pass.cpp
+ ir_opt/lower_fp16_to_fp32.cpp
ir_opt/passes.h
ir_opt/ssa_rewrite_pass.cpp
ir_opt/verification_pass.cpp
diff --git a/src/shader_recompiler/backend/spirv/emit_context.cpp b/src/shader_recompiler/backend/spirv/emit_context.cpp
index 770067d988..ea1c8a3be1 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_context.cpp
@@ -30,8 +30,11 @@ EmitContext::EmitContext(IR::Program& program) : Sirit::Module(0x00010000) {
DefineCommonTypes(program.info);
DefineCommonConstants();
DefineSpecialVariables(program.info);
- DefineConstantBuffers(program.info);
- DefineStorageBuffers(program.info);
+
+ u32 binding{};
+ DefineConstantBuffers(program.info, binding);
+ DefineStorageBuffers(program.info, binding);
+
DefineLabels(program);
}
@@ -58,6 +61,12 @@ void EmitContext::DefineCommonTypes(const Info& info) {
U1 = Name(TypeBool(), "u1");
+ // TODO: Conditionally define these
+ AddCapability(spv::Capability::Int16);
+ AddCapability(spv::Capability::Int64);
+ U16 = Name(TypeInt(16, false), "u16");
+ U64 = Name(TypeInt(64, false), "u64");
+
F32.Define(*this, TypeFloat(32), "f32");
U32.Define(*this, TypeInt(32, false), "u32");
@@ -95,12 +104,12 @@ void EmitContext::DefineSpecialVariables(const Info& info) {
}
}
-void EmitContext::DefineConstantBuffers(const Info& info) {
+void EmitContext::DefineConstantBuffers(const Info& info, u32& binding) {
if (info.constant_buffer_descriptors.empty()) {
return;
}
const Id array_type{TypeArray(U32[1], Constant(U32[1], 4096))};
- Decorate(array_type, spv::Decoration::ArrayStride, 16U);
+ Decorate(array_type, spv::Decoration::ArrayStride, 4U);
const Id struct_type{TypeStruct(array_type)};
Name(struct_type, "cbuf_block");
@@ -111,18 +120,19 @@ void EmitContext::DefineConstantBuffers(const Info& info) {
const Id uniform_type{TypePointer(spv::StorageClass::Uniform, struct_type)};
uniform_u32 = TypePointer(spv::StorageClass::Uniform, U32[1]);
- u32 binding{};
+ u32 index{};
for (const Info::ConstantBufferDescriptor& desc : info.constant_buffer_descriptors) {
const Id id{AddGlobalVariable(uniform_type, spv::StorageClass::Uniform)};
Decorate(id, spv::Decoration::Binding, binding);
Decorate(id, spv::Decoration::DescriptorSet, 0U);
Name(id, fmt::format("c{}", desc.index));
std::fill_n(cbufs.data() + desc.index, desc.count, id);
+ index += desc.count;
binding += desc.count;
}
}
-void EmitContext::DefineStorageBuffers(const Info& info) {
+void EmitContext::DefineStorageBuffers(const Info& info, u32& binding) {
if (info.storage_buffers_descriptors.empty()) {
return;
}
@@ -140,13 +150,14 @@ void EmitContext::DefineStorageBuffers(const Info& info) {
const Id storage_type{TypePointer(spv::StorageClass::StorageBuffer, struct_type)};
storage_u32 = TypePointer(spv::StorageClass::StorageBuffer, U32[1]);
- u32 binding{};
+ u32 index{};
for (const Info::StorageBufferDescriptor& desc : info.storage_buffers_descriptors) {
const Id id{AddGlobalVariable(storage_type, spv::StorageClass::StorageBuffer)};
Decorate(id, spv::Decoration::Binding, binding);
Decorate(id, spv::Decoration::DescriptorSet, 0U);
- Name(id, fmt::format("ssbo{}", binding));
- std::fill_n(ssbos.data() + binding, desc.count, id);
+ Name(id, fmt::format("ssbo{}", index));
+ std::fill_n(ssbos.data() + index, desc.count, id);
+ index += desc.count;
binding += desc.count;
}
}
diff --git a/src/shader_recompiler/backend/spirv/emit_context.h b/src/shader_recompiler/backend/spirv/emit_context.h
index c4b84759dc..8de203da2a 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.h
+++ b/src/shader_recompiler/backend/spirv/emit_context.h
@@ -37,6 +37,8 @@ public:
Id void_id{};
Id U1{};
+ Id U16{};
+ Id U64{};
VectorTypes F32;
VectorTypes U32;
VectorTypes F16;
@@ -59,8 +61,8 @@ private:
void DefineCommonTypes(const Info& info);
void DefineCommonConstants();
void DefineSpecialVariables(const Info& info);
- void DefineConstantBuffers(const Info& info);
- void DefineStorageBuffers(const Info& info);
+ void DefineConstantBuffers(const Info& info, u32& binding);
+ void DefineStorageBuffers(const Info& info, u32& binding);
void DefineLabels(IR::Program& program);
};
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index d597184359..4ce07c2814 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -14,6 +14,8 @@
#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/program.h"
+#pragma optimize("", off)
+
namespace Shader::Backend::SPIRV {
namespace {
template <class Func>
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 5813f51ff1..2b59c0b726 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -79,26 +79,27 @@ void EmitWriteStorageU16(EmitContext& ctx);
void EmitWriteStorageS16(EmitContext& ctx);
void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
Id value);
-void EmitWriteStorage64(EmitContext& ctx);
+void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
+ Id value);
void EmitWriteStorage128(EmitContext& ctx);
-void EmitCompositeConstructU32x2(EmitContext& ctx);
-void EmitCompositeConstructU32x3(EmitContext& ctx);
-void EmitCompositeConstructU32x4(EmitContext& ctx);
-void EmitCompositeExtractU32x2(EmitContext& ctx);
-Id EmitCompositeExtractU32x3(EmitContext& ctx, Id vector, u32 index);
-void EmitCompositeExtractU32x4(EmitContext& ctx);
+Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2);
+Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3);
+Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
+Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index);
+Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index);
+Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index);
void EmitCompositeConstructF16x2(EmitContext& ctx);
void EmitCompositeConstructF16x3(EmitContext& ctx);
void EmitCompositeConstructF16x4(EmitContext& ctx);
-void EmitCompositeExtractF16x2(EmitContext& ctx);
-void EmitCompositeExtractF16x3(EmitContext& ctx);
-void EmitCompositeExtractF16x4(EmitContext& ctx);
+Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index);
+Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index);
+Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index);
void EmitCompositeConstructF32x2(EmitContext& ctx);
void EmitCompositeConstructF32x3(EmitContext& ctx);
void EmitCompositeConstructF32x4(EmitContext& ctx);
-void EmitCompositeExtractF32x2(EmitContext& ctx);
-void EmitCompositeExtractF32x3(EmitContext& ctx);
-void EmitCompositeExtractF32x4(EmitContext& ctx);
+Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index);
+Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index);
+Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index);
void EmitCompositeConstructF64x2(EmitContext& ctx);
void EmitCompositeConstructF64x3(EmitContext& ctx);
void EmitCompositeConstructF64x4(EmitContext& ctx);
@@ -116,11 +117,13 @@ void EmitBitCastF16U16(EmitContext& ctx);
Id EmitBitCastF32U32(EmitContext& ctx, Id value);
void EmitBitCastF64U64(EmitContext& ctx);
void EmitPackUint2x32(EmitContext& ctx);
-void EmitUnpackUint2x32(EmitContext& ctx);
-void EmitPackFloat2x16(EmitContext& ctx);
-void EmitUnpackFloat2x16(EmitContext& ctx);
-void EmitPackDouble2x32(EmitContext& ctx);
-void EmitUnpackDouble2x32(EmitContext& ctx);
+Id EmitUnpackUint2x32(EmitContext& ctx, Id value);
+Id EmitPackFloat2x16(EmitContext& ctx, Id value);
+Id EmitUnpackFloat2x16(EmitContext& ctx, Id value);
+Id EmitPackHalf2x16(EmitContext& ctx, Id value);
+Id EmitUnpackHalf2x16(EmitContext& ctx, Id value);
+Id EmitPackDouble2x32(EmitContext& ctx, Id value);
+Id EmitUnpackDouble2x32(EmitContext& ctx, Id value);
void EmitGetZeroFromOp(EmitContext& ctx);
void EmitGetSignFromOp(EmitContext& ctx);
void EmitGetCarryFromOp(EmitContext& ctx);
@@ -159,18 +162,18 @@ void EmitFPLog2(EmitContext& ctx);
void EmitFPSaturate16(EmitContext& ctx);
void EmitFPSaturate32(EmitContext& ctx);
void EmitFPSaturate64(EmitContext& ctx);
-void EmitFPRoundEven16(EmitContext& ctx);
-void EmitFPRoundEven32(EmitContext& ctx);
-void EmitFPRoundEven64(EmitContext& ctx);
-void EmitFPFloor16(EmitContext& ctx);
-void EmitFPFloor32(EmitContext& ctx);
-void EmitFPFloor64(EmitContext& ctx);
-void EmitFPCeil16(EmitContext& ctx);
-void EmitFPCeil32(EmitContext& ctx);
-void EmitFPCeil64(EmitContext& ctx);
-void EmitFPTrunc16(EmitContext& ctx);
-void EmitFPTrunc32(EmitContext& ctx);
-void EmitFPTrunc64(EmitContext& ctx);
+Id EmitFPRoundEven16(EmitContext& ctx, Id value);
+Id EmitFPRoundEven32(EmitContext& ctx, Id value);
+Id EmitFPRoundEven64(EmitContext& ctx, Id value);
+Id EmitFPFloor16(EmitContext& ctx, Id value);
+Id EmitFPFloor32(EmitContext& ctx, Id value);
+Id EmitFPFloor64(EmitContext& ctx, Id value);
+Id EmitFPCeil16(EmitContext& ctx, Id value);
+Id EmitFPCeil32(EmitContext& ctx, Id value);
+Id EmitFPCeil64(EmitContext& ctx, Id value);
+Id EmitFPTrunc16(EmitContext& ctx, Id value);
+Id EmitFPTrunc32(EmitContext& ctx, Id value);
+Id EmitFPTrunc64(EmitContext& ctx, Id value);
Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
void EmitIAdd64(EmitContext& ctx);
Id EmitISub32(EmitContext& ctx, Id a, Id b);
@@ -201,25 +204,25 @@ void EmitLogicalOr(EmitContext& ctx);
void EmitLogicalAnd(EmitContext& ctx);
void EmitLogicalXor(EmitContext& ctx);
void EmitLogicalNot(EmitContext& ctx);
-void EmitConvertS16F16(EmitContext& ctx);
-void EmitConvertS16F32(EmitContext& ctx);
-void EmitConvertS16F64(EmitContext& ctx);
-void EmitConvertS32F16(EmitContext& ctx);
-void EmitConvertS32F32(EmitContext& ctx);
-void EmitConvertS32F64(EmitContext& ctx);
-void EmitConvertS64F16(EmitContext& ctx);
-void EmitConvertS64F32(EmitContext& ctx);
-void EmitConvertS64F64(EmitContext& ctx);
-void EmitConvertU16F16(EmitContext& ctx);
-void EmitConvertU16F32(EmitContext& ctx);
-void EmitConvertU16F64(EmitContext& ctx);
-void EmitConvertU32F16(EmitContext& ctx);
-void EmitConvertU32F32(EmitContext& ctx);
-void EmitConvertU32F64(EmitContext& ctx);
-void EmitConvertU64F16(EmitContext& ctx);
-void EmitConvertU64F32(EmitContext& ctx);
-void EmitConvertU64F64(EmitContext& ctx);
-void EmitConvertU64U32(EmitContext& ctx);
-void EmitConvertU32U64(EmitContext& ctx);
+Id EmitConvertS16F16(EmitContext& ctx, Id value);
+Id EmitConvertS16F32(EmitContext& ctx, Id value);
+Id EmitConvertS16F64(EmitContext& ctx, Id value);
+Id EmitConvertS32F16(EmitContext& ctx, Id value);
+Id EmitConvertS32F32(EmitContext& ctx, Id value);
+Id EmitConvertS32F64(EmitContext& ctx, Id value);
+Id EmitConvertS64F16(EmitContext& ctx, Id value);
+Id EmitConvertS64F32(EmitContext& ctx, Id value);
+Id EmitConvertS64F64(EmitContext& ctx, Id value);
+Id EmitConvertU16F16(EmitContext& ctx, Id value);
+Id EmitConvertU16F32(EmitContext& ctx, Id value);
+Id EmitConvertU16F64(EmitContext& ctx, Id value);
+Id EmitConvertU32F16(EmitContext& ctx, Id value);
+Id EmitConvertU32F32(EmitContext& ctx, Id value);
+Id EmitConvertU32F64(EmitContext& ctx, Id value);
+Id EmitConvertU64F16(EmitContext& ctx, Id value);
+Id EmitConvertU64F32(EmitContext& ctx, Id value);
+Id EmitConvertU64F64(EmitContext& ctx, Id value);
+Id EmitConvertU64U32(EmitContext& ctx, Id value);
+Id EmitConvertU32U64(EmitContext& ctx, Id value);
} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
index 49c2004987..e0d1ba413f 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
@@ -34,24 +34,32 @@ void EmitPackUint2x32(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitUnpackUint2x32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitUnpackUint2x32(EmitContext& ctx, Id value) {
+ return ctx.OpBitcast(ctx.U32[2], value);
}
-void EmitPackFloat2x16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitPackFloat2x16(EmitContext& ctx, Id value) {
+ return ctx.OpBitcast(ctx.U32[1], value);
}
-void EmitUnpackFloat2x16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitUnpackFloat2x16(EmitContext& ctx, Id value) {
+ return ctx.OpBitcast(ctx.F16[2], value);
}
-void EmitPackDouble2x32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitPackHalf2x16(EmitContext& ctx, Id value) {
+ return ctx.OpPackHalf2x16(ctx.U32[1], value);
}
-void EmitUnpackDouble2x32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitUnpackHalf2x16(EmitContext& ctx, Id value) {
+ return ctx.OpUnpackHalf2x16(ctx.F32[2], value);
+}
+
+Id EmitPackDouble2x32(EmitContext& ctx, Id value) {
+ return ctx.OpBitcast(ctx.F64[1], value);
+}
+
+Id EmitUnpackDouble2x32(EmitContext& ctx, Id value) {
+ return ctx.OpBitcast(ctx.U32[2], value);
}
} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
index 348e4796d5..c950854a00 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
@@ -6,28 +6,28 @@
namespace Shader::Backend::SPIRV {
-void EmitCompositeConstructU32x2(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2) {
+ return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
}
-void EmitCompositeConstructU32x3(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
+ return ctx.OpCompositeConstruct(ctx.U32[3], e1, e2, e3);
}
-void EmitCompositeConstructU32x4(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
+ return ctx.OpCompositeConstruct(ctx.U32[4], e1, e2, e3, e4);
}
-void EmitCompositeExtractU32x2(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
}
-Id EmitCompositeExtractU32x3(EmitContext& ctx, Id vector, u32 index) {
- return ctx.OpCompositeExtract(ctx.U32[1], vector, index);
+Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
}
-void EmitCompositeExtractU32x4(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
}
void EmitCompositeConstructF16x2(EmitContext&) {
@@ -42,16 +42,16 @@ void EmitCompositeConstructF16x4(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitCompositeExtractF16x2(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
}
-void EmitCompositeExtractF16x3(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
}
-void EmitCompositeExtractF16x4(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
}
void EmitCompositeConstructF32x2(EmitContext&) {
@@ -66,16 +66,16 @@ void EmitCompositeConstructF32x4(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitCompositeExtractF32x2(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
}
-void EmitCompositeExtractF32x3(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
}
-void EmitCompositeExtractF32x4(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index) {
+ return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
}
void EmitCompositeConstructF64x2(EmitContext&) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp
index 6c4199664f..48755b8278 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp
@@ -11,7 +11,7 @@ void EmitBranch(EmitContext& ctx, IR::Block* label) {
}
void EmitBranchConditional(EmitContext& ctx, Id condition, IR::Block* true_label,
- IR::Block* false_label) {
+ IR::Block* false_label) {
ctx.OpBranchConditional(condition, true_label->Definition<Id>(), false_label->Definition<Id>());
}
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp
new file mode 100644
index 0000000000..76ccaffcef
--- /dev/null
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp
@@ -0,0 +1,89 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "shader_recompiler/backend/spirv/emit_spirv.h"
+
+namespace Shader::Backend::SPIRV {
+
+Id EmitConvertS16F16(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], ctx.OpConvertFToS(ctx.U16, value));
+}
+
+Id EmitConvertS16F32(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], ctx.OpConvertFToS(ctx.U16, value));
+}
+
+Id EmitConvertS16F64(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], ctx.OpConvertFToS(ctx.U16, value));
+}
+
+Id EmitConvertS32F16(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToS(ctx.U32[1], value);
+}
+
+Id EmitConvertS32F32(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToS(ctx.U32[1], value);
+}
+
+Id EmitConvertS32F64(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToS(ctx.U32[1], value);
+}
+
+Id EmitConvertS64F16(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToS(ctx.U64, value);
+}
+
+Id EmitConvertS64F32(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToS(ctx.U64, value);
+}
+
+Id EmitConvertS64F64(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToS(ctx.U64, value);
+}
+
+Id EmitConvertU16F16(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], ctx.OpConvertFToU(ctx.U16, value));
+}
+
+Id EmitConvertU16F32(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], ctx.OpConvertFToU(ctx.U16, value));
+}
+
+Id EmitConvertU16F64(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], ctx.OpConvertFToU(ctx.U16, value));
+}
+
+Id EmitConvertU32F16(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToU(ctx.U32[1], value);
+}
+
+Id EmitConvertU32F32(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToU(ctx.U32[1], value);
+}
+
+Id EmitConvertU32F64(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToU(ctx.U32[1], value);
+}
+
+Id EmitConvertU64F16(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToU(ctx.U64, value);
+}
+
+Id EmitConvertU64F32(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToU(ctx.U64, value);
+}
+
+Id EmitConvertU64F64(EmitContext& ctx, Id value) {
+ return ctx.OpConvertFToU(ctx.U64, value);
+}
+
+Id EmitConvertU64U32(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U64, value);
+}
+
+Id EmitConvertU32U64(EmitContext& ctx, Id value) {
+ return ctx.OpUConvert(ctx.U32[1], value);
+}
+
+} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
index d24fbb353e..9ef1805310 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
@@ -169,52 +169,52 @@ void EmitFPSaturate64(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitFPRoundEven16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPRoundEven16(EmitContext& ctx, Id value) {
+ return ctx.OpRoundEven(ctx.F16[1], value);
}
-void EmitFPRoundEven32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPRoundEven32(EmitContext& ctx, Id value) {
+ return ctx.OpRoundEven(ctx.F32[1], value);
}
-void EmitFPRoundEven64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPRoundEven64(EmitContext& ctx, Id value) {
+ return ctx.OpRoundEven(ctx.F64[1], value);
}
-void EmitFPFloor16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPFloor16(EmitContext& ctx, Id value) {
+ return ctx.OpFloor(ctx.F16[1], value);
}
-void EmitFPFloor32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPFloor32(EmitContext& ctx, Id value) {
+ return ctx.OpFloor(ctx.F32[1], value);
}
-void EmitFPFloor64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPFloor64(EmitContext& ctx, Id value) {
+ return ctx.OpFloor(ctx.F64[1], value);
}
-void EmitFPCeil16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPCeil16(EmitContext& ctx, Id value) {
+ return ctx.OpCeil(ctx.F16[1], value);
}
-void EmitFPCeil32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPCeil32(EmitContext& ctx, Id value) {
+ return ctx.OpCeil(ctx.F32[1], value);
}
-void EmitFPCeil64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPCeil64(EmitContext& ctx, Id value) {
+ return ctx.OpCeil(ctx.F64[1], value);
}
-void EmitFPTrunc16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPTrunc16(EmitContext& ctx, Id value) {
+ return ctx.OpTrunc(ctx.F16[1], value);
}
-void EmitFPTrunc32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPTrunc32(EmitContext& ctx, Id value) {
+ return ctx.OpTrunc(ctx.F32[1], value);
}
-void EmitFPTrunc64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPTrunc64(EmitContext& ctx, Id value) {
+ return ctx.OpTrunc(ctx.F64[1], value);
}
} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index a1d16b81e4..22117a4ee9 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -113,20 +113,4 @@ Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs) {
return ctx.OpUGreaterThanEqual(ctx.U1, lhs, rhs);
}
-void EmitLogicalOr(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitLogicalAnd(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitLogicalXor(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitLogicalNot(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp
index ff2f4fb744..c5a07252f1 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp
@@ -6,83 +6,19 @@
namespace Shader::Backend::SPIRV {
-void EmitConvertS16F16(EmitContext&) {
+void EmitLogicalOr(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitConvertS16F32(EmitContext&) {
+void EmitLogicalAnd(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitConvertS16F64(EmitContext&) {
+void EmitLogicalXor(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitConvertS32F16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertS32F32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertS32F64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertS64F16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertS64F32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertS64F64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU16F16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU16F32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU16F64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU32F16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU32F32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU32F64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU64F16(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU64F32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU64F64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU64U32(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
-}
-
-void EmitConvertU32U64(EmitContext&) {
+void EmitLogicalNot(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
index 77d698ffd4..808c1b4016 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
@@ -94,8 +94,7 @@ void EmitLoadStorageS16(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding,
- const IR::Value& offset) {
+Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (!binding.IsImmediate()) {
throw NotImplementedException("Dynamic storage buffer indexing");
}
@@ -129,8 +128,8 @@ void EmitWriteStorageS16(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
-void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding,
- const IR::Value& offset, Id value) {
+void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
+ Id value) {
if (!binding.IsImmediate()) {
throw NotImplementedException("Dynamic storage buffer indexing");
}
@@ -140,8 +139,19 @@ void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding,
ctx.OpStore(pointer, value);
}
-void EmitWriteStorage64(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
+ Id value) {
+ if (!binding.IsImmediate()) {
+ throw NotImplementedException("Dynamic storage buffer indexing");
+ }
+ // TODO: Support reinterpreting bindings, guaranteed to be aligned
+ const Id ssbo{ctx.ssbos[binding.U32()]};
+ const Id low_index{StorageIndex(ctx, offset, sizeof(u32))};
+ const Id high_index{ctx.OpIAdd(ctx.U32[1], low_index, ctx.Constant(ctx.U32[1], 1U))};
+ const Id low_pointer{ctx.OpAccessChain(ctx.storage_u32, ssbo, ctx.u32_zero_value, low_index)};
+ const Id high_pointer{ctx.OpAccessChain(ctx.storage_u32, ssbo, ctx.u32_zero_value, high_index)};
+ ctx.OpStore(low_pointer, ctx.OpCompositeExtract(ctx.U32[1], value, 0U));
+ ctx.OpStore(high_pointer, ctx.OpCompositeExtract(ctx.U32[1], value, 1U));
}
void EmitWriteStorage128(EmitContext&) {
diff --git a/src/shader_recompiler/frontend/ir/condition.h b/src/shader_recompiler/frontend/ir/condition.h
index 16b4ae888e..51c2f15cf5 100644
--- a/src/shader_recompiler/frontend/ir/condition.h
+++ b/src/shader_recompiler/frontend/ir/condition.h
@@ -4,8 +4,8 @@
#pragma once
-#include <string>
#include <compare>
+#include <string>
#include <fmt/format.h>
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index f42489d41d..559ab9cca6 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -547,11 +547,11 @@ F32 IREmitter::FPSqrt(const F32& value) {
F16F32F64 IREmitter::FPSaturate(const F16F32F64& value) {
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<F16>(Opcode::FPSaturate16, value);
- case Type::U32:
+ case Type::F32:
return Inst<F32>(Opcode::FPSaturate32, value);
- case Type::U64:
+ case Type::F64:
return Inst<F64>(Opcode::FPSaturate64, value);
default:
ThrowInvalidType(value.Type());
@@ -560,11 +560,11 @@ F16F32F64 IREmitter::FPSaturate(const F16F32F64& value) {
F16F32F64 IREmitter::FPRoundEven(const F16F32F64& value) {
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<F16>(Opcode::FPRoundEven16, value);
- case Type::U32:
+ case Type::F32:
return Inst<F32>(Opcode::FPRoundEven32, value);
- case Type::U64:
+ case Type::F64:
return Inst<F64>(Opcode::FPRoundEven64, value);
default:
ThrowInvalidType(value.Type());
@@ -573,11 +573,11 @@ F16F32F64 IREmitter::FPRoundEven(const F16F32F64& value) {
F16F32F64 IREmitter::FPFloor(const F16F32F64& value) {
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<F16>(Opcode::FPFloor16, value);
- case Type::U32:
+ case Type::F32:
return Inst<F32>(Opcode::FPFloor32, value);
- case Type::U64:
+ case Type::F64:
return Inst<F64>(Opcode::FPFloor64, value);
default:
ThrowInvalidType(value.Type());
@@ -586,11 +586,11 @@ F16F32F64 IREmitter::FPFloor(const F16F32F64& value) {
F16F32F64 IREmitter::FPCeil(const F16F32F64& value) {
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<F16>(Opcode::FPCeil16, value);
- case Type::U32:
+ case Type::F32:
return Inst<F32>(Opcode::FPCeil32, value);
- case Type::U64:
+ case Type::F64:
return Inst<F64>(Opcode::FPCeil64, value);
default:
ThrowInvalidType(value.Type());
@@ -599,11 +599,11 @@ F16F32F64 IREmitter::FPCeil(const F16F32F64& value) {
F16F32F64 IREmitter::FPTrunc(const F16F32F64& value) {
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<F16>(Opcode::FPTrunc16, value);
- case Type::U32:
+ case Type::F32:
return Inst<F32>(Opcode::FPTrunc32, value);
- case Type::U64:
+ case Type::F64:
return Inst<F64>(Opcode::FPTrunc64, value);
default:
ThrowInvalidType(value.Type());
@@ -729,33 +729,33 @@ U32U64 IREmitter::ConvertFToS(size_t bitsize, const F16F32F64& value) {
switch (bitsize) {
case 16:
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<U32>(Opcode::ConvertS16F16, value);
- case Type::U32:
+ case Type::F32:
return Inst<U32>(Opcode::ConvertS16F32, value);
- case Type::U64:
+ case Type::F64:
return Inst<U32>(Opcode::ConvertS16F64, value);
default:
ThrowInvalidType(value.Type());
}
case 32:
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<U32>(Opcode::ConvertS32F16, value);
- case Type::U32:
+ case Type::F32:
return Inst<U32>(Opcode::ConvertS32F32, value);
- case Type::U64:
+ case Type::F64:
return Inst<U32>(Opcode::ConvertS32F64, value);
default:
ThrowInvalidType(value.Type());
}
case 64:
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<U64>(Opcode::ConvertS64F16, value);
- case Type::U32:
+ case Type::F32:
return Inst<U64>(Opcode::ConvertS64F32, value);
- case Type::U64:
+ case Type::F64:
return Inst<U64>(Opcode::ConvertS64F64, value);
default:
ThrowInvalidType(value.Type());
@@ -769,33 +769,33 @@ U32U64 IREmitter::ConvertFToU(size_t bitsize, const F16F32F64& value) {
switch (bitsize) {
case 16:
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<U32>(Opcode::ConvertU16F16, value);
- case Type::U32:
+ case Type::F32:
return Inst<U32>(Opcode::ConvertU16F32, value);
- case Type::U64:
+ case Type::F64:
return Inst<U32>(Opcode::ConvertU16F64, value);
default:
ThrowInvalidType(value.Type());
}
case 32:
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<U32>(Opcode::ConvertU32F16, value);
- case Type::U32:
+ case Type::F32:
return Inst<U32>(Opcode::ConvertU32F32, value);
- case Type::U64:
+ case Type::F64:
return Inst<U32>(Opcode::ConvertU32F64, value);
default:
ThrowInvalidType(value.Type());
}
case 64:
switch (value.Type()) {
- case Type::U16:
+ case Type::F16:
return Inst<U64>(Opcode::ConvertU64F16, value);
- case Type::U32:
+ case Type::F32:
return Inst<U64>(Opcode::ConvertU64F32, value);
- case Type::U64:
+ case Type::F64:
return Inst<U64>(Opcode::ConvertU64F64, value);
default:
ThrowInvalidType(value.Type());
@@ -829,10 +829,10 @@ U32U64 IREmitter::ConvertU(size_t result_bitsize, const U32U64& value) {
case 64:
switch (value.Type()) {
case Type::U32:
+ return Inst<U64>(Opcode::ConvertU64U32, value);
+ case Type::U64:
// Nothing to do
return value;
- case Type::U64:
- return Inst<U64>(Opcode::ConvertU64U32, value);
default:
break;
}
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index ee76db9adf..d6a9be87d5 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -216,6 +216,10 @@ void Inst::ReplaceUsesWith(Value replacement) {
}
}
+void Inst::ReplaceOpcode(IR::Opcode opcode) {
+ op = opcode;
+}
+
void Inst::Use(const Value& value) {
Inst* const inst{value.Inst()};
++inst->use_count;
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.h b/src/shader_recompiler/frontend/ir/microinstruction.h
index 5b244fa0bf..321393dd7c 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.h
+++ b/src/shader_recompiler/frontend/ir/microinstruction.h
@@ -86,6 +86,8 @@ public:
void ReplaceUsesWith(Value replacement);
+ void ReplaceOpcode(IR::Opcode opcode);
+
template <typename FlagsType>
requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
[[nodiscard]] FlagsType Flags() const noexcept {
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index ede5e20c2d..50da77535e 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -119,8 +119,10 @@ OPCODE(PackUint2x32, U64, U32x
OPCODE(UnpackUint2x32, U32x2, U64, )
OPCODE(PackFloat2x16, U32, F16x2, )
OPCODE(UnpackFloat2x16, F16x2, U32, )
-OPCODE(PackDouble2x32, U64, U32x2, )
-OPCODE(UnpackDouble2x32, U32x2, U64, )
+OPCODE(PackHalf2x16, U32, F32x2, )
+OPCODE(UnpackHalf2x16, F32x2, U32, )
+OPCODE(PackDouble2x32, F64, U32x2, )
+OPCODE(UnpackDouble2x32, U32x2, F64, )
// Pseudo-operation, handled specially at final emit
OPCODE(GetZeroFromOp, U1, Opaque, )
diff --git a/src/shader_recompiler/frontend/ir/program.cpp b/src/shader_recompiler/frontend/ir/program.cpp
index 0ce99ef2a9..8c301c3a10 100644
--- a/src/shader_recompiler/frontend/ir/program.cpp
+++ b/src/shader_recompiler/frontend/ir/program.cpp
@@ -35,4 +35,4 @@ std::string DumpProgram(const Program& program) {
return ret;
}
-} // namespace Shader::IR
\ No newline at end of file
+} // namespace Shader::IR
diff --git a/src/shader_recompiler/frontend/maxwell/program.cpp b/src/shader_recompiler/frontend/maxwell/program.cpp
index 8c44ebb29d..16cdc12e2a 100644
--- a/src/shader_recompiler/frontend/maxwell/program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/program.cpp
@@ -56,6 +56,7 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
.post_order_blocks{},
});
}
+ Optimization::LowerFp16ToFp32(program);
for (IR::Function& function : functions) {
function.post_order_blocks = PostOrder(function.blocks);
Optimization::SsaRewritePass(function.post_order_blocks);
@@ -69,6 +70,7 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
Optimization::VerificationPass(function);
}
Optimization::CollectShaderInfoPass(program);
+
fmt::print(stdout, "{}\n", IR::DumpProgram(program));
return program;
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
index 3d0c48457c..ae2d37405f 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
@@ -34,7 +34,7 @@ union F2I {
BitField<8, 2, DestFormat> dest_format;
BitField<10, 2, SrcFormat> src_format;
BitField<12, 1, u64> is_signed;
- BitField<39, 1, Rounding> rounding;
+ BitField<39, 2, Rounding> rounding;
BitField<49, 1, u64> half;
BitField<44, 1, u64> ftz;
BitField<45, 1, u64> abs;
@@ -55,6 +55,28 @@ size_t BitSize(DestFormat dest_format) {
}
}
+IR::F64 UnpackCbuf(TranslatorVisitor& v, u64 insn) {
+ union {
+ u64 raw;
+ BitField<20, 14, s64> offset;
+ BitField<34, 5, u64> binding;
+ } const cbuf{insn};
+ if (cbuf.binding >= 18) {
+ throw NotImplementedException("Out of bounds constant buffer binding {}", cbuf.binding);
+ }
+ if (cbuf.offset >= 0x4'000 || cbuf.offset < 0) {
+ throw NotImplementedException("Out of bounds constant buffer offset {}", cbuf.offset * 4);
+ }
+ if (cbuf.offset % 2 != 0) {
+ throw NotImplementedException("Unaligned F64 constant buffer offset {}", cbuf.offset * 4);
+ }
+ const IR::U32 binding{v.ir.Imm32(static_cast<u32>(cbuf.binding))};
+ const IR::U32 byte_offset{v.ir.Imm32(static_cast<u32>(cbuf.offset) * 4 + 4)};
+ const IR::U32 cbuf_data{v.ir.GetCbuf(binding, byte_offset)};
+ const IR::Value vector{v.ir.CompositeConstruct(v.ir.Imm32(0U), cbuf_data)};
+ return v.ir.PackDouble2x32(vector);
+}
+
void TranslateF2I(TranslatorVisitor& v, u64 insn, const IR::F16F32F64& src_a) {
// F2I is used to convert from a floating point value to an integer
const F2I f2i{insn};
@@ -82,19 +104,16 @@ void TranslateF2I(TranslatorVisitor& v, u64 insn, const IR::F16F32F64& src_a) {
const size_t bitsize{BitSize(f2i.dest_format)};
const IR::U16U32U64 result{v.ir.ConvertFToI(bitsize, is_signed, rounded_value)};
- v.X(f2i.dest_reg, result);
+ if (bitsize == 64) {
+ const IR::Value vector{v.ir.UnpackUint2x32(result)};
+ v.X(f2i.dest_reg + 0, IR::U32{v.ir.CompositeExtract(vector, 0)});
+ v.X(f2i.dest_reg + 1, IR::U32{v.ir.CompositeExtract(vector, 1)});
+ } else {
+ v.X(f2i.dest_reg, result);
+ }
if (f2i.cc != 0) {
- v.SetZFlag(v.ir.GetZeroFromOp(result));
- if (is_signed) {
- v.SetSFlag(v.ir.GetSignFromOp(result));
- } else {
- v.ResetSFlag();
- }
- v.ResetCFlag();
-
- // TODO: Investigate if out of bound conversions sets the overflow flag
- v.ResetOFlag();
+ throw NotImplementedException("F2I CC");
}
}
} // Anonymous namespace
@@ -118,12 +137,25 @@ void TranslatorVisitor::F2I_reg(u64 insn) {
f2i.base.src_format.Value());
}
}()};
-
TranslateF2I(*this, insn, op_a);
}
-void TranslatorVisitor::F2I_cbuf(u64) {
- throw NotImplementedException("{}", Opcode::F2I_cbuf);
+void TranslatorVisitor::F2I_cbuf(u64 insn) {
+ const F2I f2i{insn};
+ const IR::F16F32F64 op_a{[&]() -> IR::F16F32F64 {
+ switch (f2i.src_format) {
+ case SrcFormat::F16:
+ return IR::F16{ir.CompositeExtract(ir.UnpackFloat2x16(GetCbuf(insn)), f2i.half)};
+ case SrcFormat::F32:
+ return GetCbufF(insn);
+ case SrcFormat::F64: {
+ return UnpackCbuf(*this, insn);
+ }
+ default:
+ throw NotImplementedException("Invalid F2I source format {}", f2i.src_format.Value());
+ }
+ }()};
+ TranslateF2I(*this, insn, op_a);
}
void TranslatorVisitor::F2I_imm(u64) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 8bd468244e..27aba2cf87 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -11,7 +11,7 @@ namespace Shader::Maxwell {
class TranslatorVisitor {
public:
- explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_} ,ir(block) {}
+ explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_}, ir(block) {}
Environment& env;
IR::IREmitter ir;
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index f2326dea14..f7f102f533 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -26,6 +26,22 @@ void Visit(Info& info, IR::Inst& inst) {
case IR::Opcode::LocalInvocationId:
info.uses_local_invocation_id = true;
break;
+ case IR::Opcode::CompositeConstructF16x2:
+ case IR::Opcode::CompositeConstructF16x3:
+ case IR::Opcode::CompositeConstructF16x4:
+ case IR::Opcode::CompositeExtractF16x2:
+ case IR::Opcode::CompositeExtractF16x3:
+ case IR::Opcode::CompositeExtractF16x4:
+ case IR::Opcode::BitCastU16F16:
+ case IR::Opcode::BitCastF16U16:
+ case IR::Opcode::PackFloat2x16:
+ case IR::Opcode::UnpackFloat2x16:
+ case IR::Opcode::ConvertS16F16:
+ case IR::Opcode::ConvertS32F16:
+ case IR::Opcode::ConvertS64F16:
+ case IR::Opcode::ConvertU16F16:
+ case IR::Opcode::ConvertU32F16:
+ case IR::Opcode::ConvertU64F16:
case IR::Opcode::FPAbs16:
case IR::Opcode::FPAdd16:
case IR::Opcode::FPCeil16:
@@ -36,7 +52,7 @@ void Visit(Info& info, IR::Inst& inst) {
case IR::Opcode::FPRoundEven16:
case IR::Opcode::FPSaturate16:
case IR::Opcode::FPTrunc16:
- info.uses_fp16;
+ info.uses_fp16 = true;
break;
case IR::Opcode::FPAbs64:
case IR::Opcode::FPAdd64:
diff --git a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
index 9eb61b54c5..4d4e88259a 100644
--- a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
+++ b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
@@ -104,12 +104,12 @@ void FoldGetPred(IR::Inst& inst) {
bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
/*
* We are looking for this pattern:
- * %rhs_bfe = BitFieldUExtract %factor_a, #0, #16 (uses: 1)
- * %rhs_mul = IMul32 %rhs_bfe, %factor_b (uses: 1)
- * %lhs_bfe = BitFieldUExtract %factor_a, #16, #16 (uses: 1)
- * %rhs_mul = IMul32 %lhs_bfe, %factor_b (uses: 1)
- * %lhs_shl = ShiftLeftLogical32 %rhs_mul, #16 (uses: 1)
- * %result = IAdd32 %lhs_shl, %rhs_mul (uses: 10)
+ * %rhs_bfe = BitFieldUExtract %factor_a, #0, #16
+ * %rhs_mul = IMul32 %rhs_bfe, %factor_b
+ * %lhs_bfe = BitFieldUExtract %factor_a, #16, #16
+ * %rhs_mul = IMul32 %lhs_bfe, %factor_b
+ * %lhs_shl = ShiftLeftLogical32 %rhs_mul, #16
+ * %result = IAdd32 %lhs_shl, %rhs_mul
*
* And replacing it with
* %result = IMul32 %factor_a, %factor_b
diff --git a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
new file mode 100644
index 0000000000..c7032f1686
--- /dev/null
+++ b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
@@ -0,0 +1,79 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include <algorithm>
+
+#include "shader_recompiler/frontend/ir/ir_emitter.h"
+#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/ir_opt/passes.h"
+
+namespace Shader::Optimization {
+namespace {
+IR::Opcode Replace(IR::Opcode op) {
+ switch (op) {
+ case IR::Opcode::FPAbs16:
+ return IR::Opcode::FPAbs32;
+ case IR::Opcode::FPAdd16:
+ return IR::Opcode::FPAdd32;
+ case IR::Opcode::FPCeil16:
+ return IR::Opcode::FPCeil32;
+ case IR::Opcode::FPFloor16:
+ return IR::Opcode::FPFloor32;
+ case IR::Opcode::FPFma16:
+ return IR::Opcode::FPFma32;
+ case IR::Opcode::FPMul16:
+ return IR::Opcode::FPMul32;
+ case IR::Opcode::FPNeg16:
+ return IR::Opcode::FPNeg32;
+ case IR::Opcode::FPRoundEven16:
+ return IR::Opcode::FPRoundEven32;
+ case IR::Opcode::FPSaturate16:
+ return IR::Opcode::FPSaturate32;
+ case IR::Opcode::FPTrunc16:
+ return IR::Opcode::FPTrunc32;
+ case IR::Opcode::CompositeConstructF16x2:
+ return IR::Opcode::CompositeConstructF32x2;
+ case IR::Opcode::CompositeConstructF16x3:
+ return IR::Opcode::CompositeConstructF32x3;
+ case IR::Opcode::CompositeConstructF16x4:
+ return IR::Opcode::CompositeConstructF32x4;
+ case IR::Opcode::CompositeExtractF16x2:
+ return IR::Opcode::CompositeExtractF32x2;
+ case IR::Opcode::CompositeExtractF16x3:
+ return IR::Opcode::CompositeExtractF32x3;
+ case IR::Opcode::CompositeExtractF16x4:
+ return IR::Opcode::CompositeExtractF32x4;
+ case IR::Opcode::ConvertS16F16:
+ return IR::Opcode::ConvertS16F32;
+ case IR::Opcode::ConvertS32F16:
+ return IR::Opcode::ConvertS32F32;
+ case IR::Opcode::ConvertS64F16:
+ return IR::Opcode::ConvertS64F32;
+ case IR::Opcode::ConvertU16F16:
+ return IR::Opcode::ConvertU16F32;
+ case IR::Opcode::ConvertU32F16:
+ return IR::Opcode::ConvertU32F32;
+ case IR::Opcode::ConvertU64F16:
+ return IR::Opcode::ConvertU64F32;
+ case IR::Opcode::PackFloat2x16:
+ return IR::Opcode::PackHalf2x16;
+ case IR::Opcode::UnpackFloat2x16:
+ return IR::Opcode::UnpackHalf2x16;
+ default:
+ return op;
+ }
+}
+} // Anonymous namespace
+
+void LowerFp16ToFp32(IR::Program& program) {
+ for (IR::Function& function : program.functions) {
+ for (IR::Block* const block : function.blocks) {
+ for (IR::Inst& inst : block->Instructions()) {
+ inst.ReplaceOpcode(Replace(inst.Opcode()));
+ }
+ }
+ }
+}
+
+} // namespace Shader::Optimization
diff --git a/src/shader_recompiler/ir_opt/passes.h b/src/shader_recompiler/ir_opt/passes.h
index 89e5811d3f..38106308cb 100644
--- a/src/shader_recompiler/ir_opt/passes.h
+++ b/src/shader_recompiler/ir_opt/passes.h
@@ -24,6 +24,7 @@ void ConstantPropagationPass(IR::Block& block);
void DeadCodeEliminationPass(IR::Block& block);
void GlobalMemoryToStorageBufferPass(IR::Program& program);
void IdentityRemovalPass(IR::Function& function);
+void LowerFp16ToFp32(IR::Program& program);
void SsaRewritePass(std::span<IR::Block* const> post_order_blocks);
void VerificationPass(const IR::Function& function);
diff --git a/src/shader_recompiler/main.cpp b/src/shader_recompiler/main.cpp
index 050a37f180..abd44e3232 100644
--- a/src/shader_recompiler/main.cpp
+++ b/src/shader_recompiler/main.cpp
@@ -67,8 +67,8 @@ int main() {
ObjectPool<IR::Inst> inst_pool;
ObjectPool<IR::Block> block_pool;
- FileEnvironment env{"D:\\Shaders\\Database\\Oninaki\\CS8F146B41DB6BD826.bin"};
- // FileEnvironment env{"D:\\Shaders\\shader.bin"};
+ // FileEnvironment env{"D:\\Shaders\\Database\\Oninaki\\CS8F146B41DB6BD826.bin"};
+ FileEnvironment env{"D:\\Shaders\\shader.bin"};
block_pool.ReleaseContents();
inst_pool.ReleaseContents();
flow_block_pool.ReleaseContents();
@@ -76,5 +76,9 @@ int main() {
fmt::print(stdout, "{}\n", cfg.Dot());
IR::Program program{TranslateProgram(inst_pool, block_pool, env, cfg)};
fmt::print(stdout, "{}\n", IR::DumpProgram(program));
- void(Backend::SPIRV::EmitSPIRV(env, program));
+ const std::vector<u32> spirv{Backend::SPIRV::EmitSPIRV(env, program)};
+ std::FILE* const file{std::fopen("D:\\shader.spv", "wb")};
+ std::fwrite(spirv.data(), spirv.size(), sizeof(u32), file);
+ std::fclose(file);
+ std::system("spirv-dis D:\\shader.spv");
}
diff --git a/src/shader_recompiler/object_pool.h b/src/shader_recompiler/object_pool.h
index f78813b5f2..c10751b9d1 100644
--- a/src/shader_recompiler/object_pool.h
+++ b/src/shader_recompiler/object_pool.h
@@ -18,7 +18,7 @@ public:
}
template <typename... Args>
- requires std::is_constructible_v<T, Args...> [[nodiscard]] T* Create(Args&&... args) {
+ requires std::is_constructible_v<T, Args...>[[nodiscard]] T* Create(Args&&... args) {
return std::construct_at(Memory(), std::forward<Args>(args)...);
}
diff --git a/src/video_core/renderer_vulkan/vk_compute_pass.cpp b/src/video_core/renderer_vulkan/vk_compute_pass.cpp
index 4181d83ee9..a444d55d38 100644
--- a/src/video_core/renderer_vulkan/vk_compute_pass.cpp
+++ b/src/video_core/renderer_vulkan/vk_compute_pass.cpp
@@ -206,6 +206,8 @@ VKComputePass::VKComputePass(const Device& device, VKDescriptorPool& descriptor_
.codeSize = static_cast<u32>(code.size_bytes()),
.pCode = code.data(),
});
+ /*
+ FIXME
pipeline = device.GetLogical().CreateComputePipeline({
.sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
.pNext = nullptr,
@@ -224,6 +226,7 @@ VKComputePass::VKComputePass(const Device& device, VKDescriptorPool& descriptor_
.basePipelineHandle = nullptr,
.basePipelineIndex = 0,
});
+ */
}
VKComputePass::~VKComputePass() = default;
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
index 4bf3e4819c..c2a41a3603 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
@@ -31,8 +31,6 @@
#include "video_core/vulkan_common/vulkan_device.h"
#include "video_core/vulkan_common/vulkan_wrapper.h"
-#pragma optimize("", off)
-
namespace Vulkan {
MICROPROFILE_DECLARE(Vulkan_PipelineCache);
@@ -180,6 +178,12 @@ ComputePipeline PipelineCache::CreateComputePipeline(ShaderInfo* shader_info) {
// TODO: Load from cache
}
const auto [info, code]{Shader::RecompileSPIRV(env, qmd.program_start)};
+
+ FILE* file = fopen("D:\\shader.spv", "wb");
+ fwrite(code.data(), 4, code.size(), file);
+ fclose(file);
+ std::system("spirv-dis D:\\shader.spv");
+
shader_info->unique_hash = env.ComputeHash();
shader_info->size_bytes = env.ShaderSize();
return ComputePipeline{device, descriptor_pool, update_descriptor_queue, info,
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index b757454c49..1b662f9f3a 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -36,8 +36,6 @@
#include "video_core/vulkan_common/vulkan_device.h"
#include "video_core/vulkan_common/vulkan_wrapper.h"
-#pragma optimize("", off)
-
namespace Vulkan {
using Maxwell = Tegra::Engines::Maxwell3D::Regs;
diff --git a/src/video_core/vulkan_common/vulkan_device.cpp b/src/video_core/vulkan_common/vulkan_device.cpp
index f214510da6..85f903125b 100644
--- a/src/video_core/vulkan_common/vulkan_device.cpp
+++ b/src/video_core/vulkan_common/vulkan_device.cpp
@@ -247,9 +247,9 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
.shaderStorageImageArrayDynamicIndexing = false,
.shaderClipDistance = false,
.shaderCullDistance = false,
- .shaderFloat64 = false,
- .shaderInt64 = false,
- .shaderInt16 = false,
+ .shaderFloat64 = true,
+ .shaderInt64 = true,
+ .shaderInt16 = true,
.shaderResourceResidency = false,
.shaderResourceMinLod = false,
.sparseBinding = false,
@@ -420,8 +420,8 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
}
if (is_float16_supported && driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS) {
// Intel's compiler crashes when using fp16 on Astral Chain, disable it for the time being.
- LOG_WARNING(Render_Vulkan, "Blacklisting Intel proprietary from float16 math");
- is_float16_supported = false;
+ // LOG_WARNING(Render_Vulkan, "Blacklisting Intel proprietary from float16 math");
+ // is_float16_supported = false;
}
graphics_queue = logical.GetQueue(graphics_family);
--
cgit v1.2.3-70-g09d2
From 71f96fa6366dc6dd306a953bca1b958fb32bc55a Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Sun, 14 Mar 2021 03:41:05 -0300
Subject: shader: Implement CAL inlining function calls
---
src/shader_recompiler/CMakeLists.txt | 6 +-
.../backend/spirv/emit_context.cpp | 6 +-
src/shader_recompiler/backend/spirv/emit_spirv.cpp | 17 +-
src/shader_recompiler/frontend/ir/function.cpp | 5 -
src/shader_recompiler/frontend/ir/function.h | 18 -
src/shader_recompiler/frontend/ir/program.cpp | 18 +-
src/shader_recompiler/frontend/ir/program.h | 5 +-
.../frontend/ir/structured_control_flow.cpp | 744 --------------------
.../frontend/ir/structured_control_flow.h | 22 -
.../frontend/maxwell/control_flow.cpp | 78 +--
.../frontend/maxwell/control_flow.h | 19 +-
src/shader_recompiler/frontend/maxwell/program.cpp | 71 +-
.../frontend/maxwell/structured_control_flow.cpp | 770 +++++++++++++++++++++
.../frontend/maxwell/structured_control_flow.h | 24 +
.../frontend/maxwell/translate/impl/impl.h | 2 +-
.../maxwell/translate/impl/not_implemented.cpp | 4 +-
.../ir_opt/collect_shader_info_pass.cpp | 8 +-
.../ir_opt/constant_propagation_pass.cpp | 8 +-
.../ir_opt/dead_code_elimination_pass.cpp | 10 +-
.../global_memory_to_storage_buffer_pass.cpp | 12 +-
.../ir_opt/identity_removal_pass.cpp | 4 +-
.../ir_opt/lower_fp16_to_fp32.cpp | 8 +-
src/shader_recompiler/ir_opt/passes.h | 18 +-
src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp | 5 +-
src/shader_recompiler/ir_opt/texture_pass.cpp | 12 +-
src/shader_recompiler/ir_opt/verification_pass.cpp | 16 +-
26 files changed, 933 insertions(+), 977 deletions(-)
delete mode 100644 src/shader_recompiler/frontend/ir/function.cpp
delete mode 100644 src/shader_recompiler/frontend/ir/function.h
delete mode 100644 src/shader_recompiler/frontend/ir/structured_control_flow.cpp
delete mode 100644 src/shader_recompiler/frontend/ir/structured_control_flow.h
create mode 100644 src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
create mode 100644 src/shader_recompiler/frontend/maxwell/structured_control_flow.h
(limited to 'src/shader_recompiler/frontend/ir/program.cpp')
diff --git a/src/shader_recompiler/CMakeLists.txt b/src/shader_recompiler/CMakeLists.txt
index 171fdd321d..20409e09a2 100644
--- a/src/shader_recompiler/CMakeLists.txt
+++ b/src/shader_recompiler/CMakeLists.txt
@@ -27,8 +27,6 @@ add_library(shader_recompiler STATIC
frontend/ir/condition.h
frontend/ir/flow_test.cpp
frontend/ir/flow_test.h
- frontend/ir/function.cpp
- frontend/ir/function.h
frontend/ir/ir_emitter.cpp
frontend/ir/ir_emitter.h
frontend/ir/microinstruction.cpp
@@ -43,8 +41,6 @@ add_library(shader_recompiler STATIC
frontend/ir/program.cpp
frontend/ir/program.h
frontend/ir/reg.h
- frontend/ir/structured_control_flow.cpp
- frontend/ir/structured_control_flow.h
frontend/ir/type.cpp
frontend/ir/type.h
frontend/ir/value.cpp
@@ -60,6 +56,8 @@ add_library(shader_recompiler STATIC
frontend/maxwell/opcodes.h
frontend/maxwell/program.cpp
frontend/maxwell/program.h
+ frontend/maxwell/structured_control_flow.cpp
+ frontend/maxwell/structured_control_flow.h
frontend/maxwell/translate/impl/bitfield_extract.cpp
frontend/maxwell/translate/impl/bitfield_insert.cpp
frontend/maxwell/translate/impl/common_encoding.h
diff --git a/src/shader_recompiler/backend/spirv/emit_context.cpp b/src/shader_recompiler/backend/spirv/emit_context.cpp
index 278b26b503..f848c61757 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_context.cpp
@@ -262,10 +262,8 @@ void EmitContext::DefineTextures(const Info& info, u32& binding) {
}
void EmitContext::DefineLabels(IR::Program& program) {
- for (const IR::Function& function : program.functions) {
- for (IR::Block* const block : function.blocks) {
- block->SetDefinition(OpLabel());
- }
+ for (IR::Block* const block : program.blocks) {
+ block->SetDefinition(OpLabel());
}
}
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index c7cba62793..7e7db9161d 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -10,7 +10,6 @@
#include "shader_recompiler/backend/spirv/emit_spirv.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/function.h"
#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/program.h"
@@ -199,18 +198,14 @@ Id PhiArgDef(EmitContext& ctx, IR::Inst* inst, size_t index) {
std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, IR::Program& program) {
EmitContext ctx{profile, program};
const Id void_function{ctx.TypeFunction(ctx.void_id)};
- // FIXME: Forward declare functions (needs sirit support)
- Id func{};
- for (IR::Function& function : program.functions) {
- func = ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function);
- for (IR::Block* const block : function.blocks) {
- ctx.AddLabel(block->Definition<Id>());
- for (IR::Inst& inst : block->Instructions()) {
- EmitInst(ctx, &inst);
- }
+ const Id func{ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function)};
+ for (IR::Block* const block : program.blocks) {
+ ctx.AddLabel(block->Definition<Id>());
+ for (IR::Inst& inst : block->Instructions()) {
+ EmitInst(ctx, &inst);
}
- ctx.OpFunctionEnd();
}
+ ctx.OpFunctionEnd();
boost::container::small_vector<Id, 32> interfaces;
const Info& info{program.info};
if (info.uses_workgroup_id) {
diff --git a/src/shader_recompiler/frontend/ir/function.cpp b/src/shader_recompiler/frontend/ir/function.cpp
deleted file mode 100644
index d1fc9461d0..0000000000
--- a/src/shader_recompiler/frontend/ir/function.cpp
+++ /dev/null
@@ -1,5 +0,0 @@
-// Copyright 2021 yuzu Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#include "shader_recompiler/frontend/ir/function.h"
diff --git a/src/shader_recompiler/frontend/ir/function.h b/src/shader_recompiler/frontend/ir/function.h
deleted file mode 100644
index d1f0611467..0000000000
--- a/src/shader_recompiler/frontend/ir/function.h
+++ /dev/null
@@ -1,18 +0,0 @@
-// Copyright 2021 yuzu Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#pragma once
-
-#include <boost/container/small_vector.hpp>
-
-#include "shader_recompiler/frontend/ir/basic_block.h"
-
-namespace Shader::IR {
-
-struct Function {
- BlockList blocks;
- BlockList post_order_blocks;
-};
-
-} // namespace Shader::IR
diff --git a/src/shader_recompiler/frontend/ir/program.cpp b/src/shader_recompiler/frontend/ir/program.cpp
index 8c301c3a10..5f51aeb5f3 100644
--- a/src/shader_recompiler/frontend/ir/program.cpp
+++ b/src/shader_recompiler/frontend/ir/program.cpp
@@ -9,7 +9,8 @@
#include <fmt/format.h>
-#include "shader_recompiler/frontend/ir/function.h"
+#include "shader_recompiler/frontend/ir/basic_block.h"
+#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/program.h"
namespace Shader::IR {
@@ -19,18 +20,13 @@ std::string DumpProgram(const Program& program) {
std::map<const IR::Inst*, size_t> inst_to_index;
std::map<const IR::Block*, size_t> block_to_index;
- for (const IR::Function& function : program.functions) {
- for (const IR::Block* const block : function.blocks) {
- block_to_index.emplace(block, index);
- ++index;
- }
+ for (const IR::Block* const block : program.blocks) {
+ block_to_index.emplace(block, index);
+ ++index;
}
std::string ret;
- for (const IR::Function& function : program.functions) {
- ret += fmt::format("Function\n");
- for (const auto& block : function.blocks) {
- ret += IR::DumpBlock(*block, block_to_index, inst_to_index, index) + '\n';
- }
+ for (const auto& block : program.blocks) {
+ ret += IR::DumpBlock(*block, block_to_index, inst_to_index, index) + '\n';
}
return ret;
}
diff --git a/src/shader_recompiler/frontend/ir/program.h b/src/shader_recompiler/frontend/ir/program.h
index 98aab2dc68..bce8b19b3a 100644
--- a/src/shader_recompiler/frontend/ir/program.h
+++ b/src/shader_recompiler/frontend/ir/program.h
@@ -8,13 +8,14 @@
#include <boost/container/small_vector.hpp>
-#include "shader_recompiler/frontend/ir/function.h"
+#include "shader_recompiler/frontend/ir/basic_block.h"
#include "shader_recompiler/shader_info.h"
namespace Shader::IR {
struct Program {
- boost::container::small_vector<Function, 1> functions;
+ BlockList blocks;
+ BlockList post_order_blocks;
Info info;
};
diff --git a/src/shader_recompiler/frontend/ir/structured_control_flow.cpp b/src/shader_recompiler/frontend/ir/structured_control_flow.cpp
deleted file mode 100644
index bfba55a7ed..0000000000
--- a/src/shader_recompiler/frontend/ir/structured_control_flow.cpp
+++ /dev/null
@@ -1,744 +0,0 @@
-// Copyright 2021 yuzu Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#include <algorithm>
-#include <memory>
-#include <ranges>
-#include <string>
-#include <unordered_map>
-#include <utility>
-#include <vector>
-
-#include <fmt/format.h>
-
-#include <boost/intrusive/list.hpp>
-
-#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/ir_emitter.h"
-#include "shader_recompiler/object_pool.h"
-
-namespace Shader::IR {
-namespace {
-struct Statement;
-
-// Use normal_link because we are not guaranteed to destroy the tree in order
-using ListBaseHook =
- boost::intrusive::list_base_hook<boost::intrusive::link_mode<boost::intrusive::normal_link>>;
-
-using Tree = boost::intrusive::list<Statement,
- // Allow using Statement without a definition
- boost::intrusive::base_hook<ListBaseHook>,
- // Avoid linear complexity on splice, size is never called
- boost::intrusive::constant_time_size<false>>;
-using Node = Tree::iterator;
-using ConstNode = Tree::const_iterator;
-
-enum class StatementType {
- Code,
- Goto,
- Label,
- If,
- Loop,
- Break,
- Return,
- Function,
- Identity,
- Not,
- Or,
- SetVariable,
- Variable,
-};
-
-bool HasChildren(StatementType type) {
- switch (type) {
- case StatementType::If:
- case StatementType::Loop:
- case StatementType::Function:
- return true;
- default:
- return false;
- }
-}
-
-struct Goto {};
-struct Label {};
-struct If {};
-struct Loop {};
-struct Break {};
-struct Return {};
-struct FunctionTag {};
-struct Identity {};
-struct Not {};
-struct Or {};
-struct SetVariable {};
-struct Variable {};
-
-#ifdef _MSC_VER
-#pragma warning(push)
-#pragma warning(disable : 26495) // Always initialize a member variable, expected in Statement
-#endif
-struct Statement : ListBaseHook {
- Statement(Block* code_, Statement* up_) : code{code_}, up{up_}, type{StatementType::Code} {}
- Statement(Goto, Statement* cond_, Node label_, Statement* up_)
- : label{label_}, cond{cond_}, up{up_}, type{StatementType::Goto} {}
- Statement(Label, u32 id_, Statement* up_) : id{id_}, up{up_}, type{StatementType::Label} {}
- Statement(If, Statement* cond_, Tree&& children_, Statement* up_)
- : children{std::move(children_)}, cond{cond_}, up{up_}, type{StatementType::If} {}
- Statement(Loop, Statement* cond_, Tree&& children_, Statement* up_)
- : children{std::move(children_)}, cond{cond_}, up{up_}, type{StatementType::Loop} {}
- Statement(Break, Statement* cond_, Statement* up_)
- : cond{cond_}, up{up_}, type{StatementType::Break} {}
- Statement(Return) : type{StatementType::Return} {}
- Statement(FunctionTag) : children{}, type{StatementType::Function} {}
- Statement(Identity, Condition cond_) : guest_cond{cond_}, type{StatementType::Identity} {}
- Statement(Not, Statement* op_) : op{op_}, type{StatementType::Not} {}
- Statement(Or, Statement* op_a_, Statement* op_b_)
- : op_a{op_a_}, op_b{op_b_}, type{StatementType::Or} {}
- Statement(SetVariable, u32 id_, Statement* op_, Statement* up_)
- : op{op_}, id{id_}, up{up_}, type{StatementType::SetVariable} {}
- Statement(Variable, u32 id_) : id{id_}, type{StatementType::Variable} {}
-
- ~Statement() {
- if (HasChildren(type)) {
- std::destroy_at(&children);
- }
- }
-
- union {
- Block* code;
- Node label;
- Tree children;
- Condition guest_cond;
- Statement* op;
- Statement* op_a;
- };
- union {
- Statement* cond;
- Statement* op_b;
- u32 id;
- };
- Statement* up{};
- StatementType type;
-};
-#ifdef _MSC_VER
-#pragma warning(pop)
-#endif
-
-std::string DumpExpr(const Statement* stmt) {
- switch (stmt->type) {
- case StatementType::Identity:
- return fmt::format("{}", stmt->guest_cond);
- case StatementType::Not:
- return fmt::format("!{}", DumpExpr(stmt->op));
- case StatementType::Or:
- return fmt::format("{} || {}", DumpExpr(stmt->op_a), DumpExpr(stmt->op_b));
- case StatementType::Variable:
- return fmt::format("goto_L{}", stmt->id);
- default:
- return "<invalid type>";
- }
-}
-
-std::string DumpTree(const Tree& tree, u32 indentation = 0) {
- std::string ret;
- std::string indent(indentation, ' ');
- for (auto stmt = tree.begin(); stmt != tree.end(); ++stmt) {
- switch (stmt->type) {
- case StatementType::Code:
- ret += fmt::format("{} Block {:04x};\n", indent, stmt->code->LocationBegin());
- break;
- case StatementType::Goto:
- ret += fmt::format("{} if ({}) goto L{};\n", indent, DumpExpr(stmt->cond),
- stmt->label->id);
- break;
- case StatementType::Label:
- ret += fmt::format("{}L{}:\n", indent, stmt->id);
- break;
- case StatementType::If:
- ret += fmt::format("{} if ({}) {{\n", indent, DumpExpr(stmt->cond));
- ret += DumpTree(stmt->children, indentation + 4);
- ret += fmt::format("{} }}\n", indent);
- break;
- case StatementType::Loop:
- ret += fmt::format("{} do {{\n", indent);
- ret += DumpTree(stmt->children, indentation + 4);
- ret += fmt::format("{} }} while ({});\n", indent, DumpExpr(stmt->cond));
- break;
- case StatementType::Break:
- ret += fmt::format("{} if ({}) break;\n", indent, DumpExpr(stmt->cond));
- break;
- case StatementType::Return:
- ret += fmt::format("{} return;\n", indent);
- break;
- case StatementType::SetVariable:
- ret += fmt::format("{} goto_L{} = {};\n", indent, stmt->id, DumpExpr(stmt->op));
- break;
- case StatementType::Function:
- case StatementType::Identity:
- case StatementType::Not:
- case StatementType::Or:
- case StatementType::Variable:
- throw LogicError("Statement can't be printed");
- }
- }
- return ret;
-}
-
-bool HasNode(const Tree& tree, ConstNode stmt) {
- const auto end{tree.end()};
- for (auto it = tree.begin(); it != end; ++it) {
- if (it == stmt || (HasChildren(it->type) && HasNode(it->children, stmt))) {
- return true;
- }
- }
- return false;
-}
-
-Node FindStatementWithLabel(Tree& tree, ConstNode goto_stmt) {
- const ConstNode label_stmt{goto_stmt->label};
- const ConstNode end{tree.end()};
- for (auto it = tree.begin(); it != end; ++it) {
- if (it == label_stmt || (HasChildren(it->type) && HasNode(it->children, label_stmt))) {
- return it;
- }
- }
- throw LogicError("Lift label not in tree");
-}
-
-void SanitizeNoBreaks(const Tree& tree) {
- if (std::ranges::find(tree, StatementType::Break, &Statement::type) != tree.end()) {
- throw NotImplementedException("Capturing statement with break nodes");
- }
-}
-
-size_t Level(Node stmt) {
- size_t level{0};
- Statement* node{stmt->up};
- while (node) {
- ++level;
- node = node->up;
- }
- return level;
-}
-
-bool IsDirectlyRelated(Node goto_stmt, Node label_stmt) {
- const size_t goto_level{Level(goto_stmt)};
- const size_t label_level{Level(label_stmt)};
- size_t min_level;
- size_t max_level;
- Node min;
- Node max;
- if (label_level < goto_level) {
- min_level = label_level;
- max_level = goto_level;
- min = label_stmt;
- max = goto_stmt;
- } else { // goto_level < label_level
- min_level = goto_level;
- max_level = label_level;
- min = goto_stmt;
- max = label_stmt;
- }
- while (max_level > min_level) {
- --max_level;
- max = max->up;
- }
- return min->up == max->up;
-}
-
-bool IsIndirectlyRelated(Node goto_stmt, Node label_stmt) {
- return goto_stmt->up != label_stmt->up && !IsDirectlyRelated(goto_stmt, label_stmt);
-}
-
-bool SearchNode(const Tree& tree, ConstNode stmt, size_t& offset) {
- ++offset;
-
- const auto end = tree.end();
- for (ConstNode it = tree.begin(); it != end; ++it) {
- ++offset;
- if (stmt == it) {
- return true;
- }
- if (HasChildren(it->type) && SearchNode(it->children, stmt, offset)) {
- return true;
- }
- }
- return false;
-}
-
-class GotoPass {
-public:
- explicit GotoPass(std::span<Block* const> blocks, ObjectPool<Statement>& stmt_pool)
- : pool{stmt_pool} {
- std::vector gotos{BuildUnorderedTreeGetGotos(blocks)};
- for (const Node& goto_stmt : gotos | std::views::reverse) {
- RemoveGoto(goto_stmt);
- }
- }
-
- Statement& RootStatement() noexcept {
- return root_stmt;
- }
-
-private:
- void RemoveGoto(Node goto_stmt) {
- // Force goto_stmt and label_stmt to be directly related
- const Node label_stmt{goto_stmt->label};
- if (IsIndirectlyRelated(goto_stmt, label_stmt)) {
- // Move goto_stmt out using outward-movement transformation until it becomes
- // directly related to label_stmt
- while (!IsDirectlyRelated(goto_stmt, label_stmt)) {
- goto_stmt = MoveOutward(goto_stmt);
- }
- }
- // Force goto_stmt and label_stmt to be siblings
- if (IsDirectlyRelated(goto_stmt, label_stmt)) {
- const size_t label_level{Level(label_stmt)};
- size_t goto_level{Level(goto_stmt)};
- if (goto_level > label_level) {
- // Move goto_stmt out of its level using outward-movement transformations
- while (goto_level > label_level) {
- goto_stmt = MoveOutward(goto_stmt);
- --goto_level;
- }
- } else { // Level(goto_stmt) < Level(label_stmt)
- if (Offset(goto_stmt) > Offset(label_stmt)) {
- // Lift goto_stmt to above stmt containing label_stmt using goto-lifting
- // transformations
- goto_stmt = Lift(goto_stmt);
- }
- // Move goto_stmt into label_stmt's level using inward-movement transformation
- while (goto_level < label_level) {
- goto_stmt = MoveInward(goto_stmt);
- ++goto_level;
- }
- }
- }
- // TODO: Remove this
- Node it{goto_stmt};
- bool sibling{false};
- do {
- sibling |= it == label_stmt;
- --it;
- } while (it != goto_stmt->up->children.begin());
- while (it != goto_stmt->up->children.end()) {
- sibling |= it == label_stmt;
- ++it;
- }
- if (!sibling) {
- throw LogicError("Not siblings");
- }
- // goto_stmt and label_stmt are guaranteed to be siblings, eliminate
- if (std::next(goto_stmt) == label_stmt) {
- // Simply eliminate the goto if the label is next to it
- goto_stmt->up->children.erase(goto_stmt);
- } else if (Offset(goto_stmt) < Offset(label_stmt)) {
- // Eliminate goto_stmt with a conditional
- EliminateAsConditional(goto_stmt, label_stmt);
- } else {
- // Eliminate goto_stmt with a loop
- EliminateAsLoop(goto_stmt, label_stmt);
- }
- }
-
- std::vector<Node> BuildUnorderedTreeGetGotos(std::span<Block* const> blocks) {
- // Assume all blocks have two branches
- std::vector<Node> gotos;
- gotos.reserve(blocks.size() * 2);
-
- const std::unordered_map labels_map{BuildLabels(blocks)};
- Tree& root{root_stmt.children};
- auto insert_point{root.begin()};
- // Skip all goto variables zero-initialization
- std::advance(insert_point, labels_map.size());
-
- for (Block* const block : blocks) {
- // Skip label
- ++insert_point;
- // Skip set variable
- ++insert_point;
- root.insert(insert_point, *pool.Create(block, &root_stmt));
-
- if (block->IsTerminationBlock()) {
- root.insert(insert_point, *pool.Create(Return{}));
- continue;
- }
- const Condition cond{block->BranchCondition()};
- Statement* const true_cond{pool.Create(Identity{}, Condition{true})};
- if (cond == Condition{true} || cond == Condition{false}) {
- const bool is_true{cond == Condition{true}};
- const Block* const branch{is_true ? block->TrueBranch() : block->FalseBranch()};
- const Node label{labels_map.at(branch)};
- Statement* const goto_stmt{pool.Create(Goto{}, true_cond, label, &root_stmt)};
- gotos.push_back(root.insert(insert_point, *goto_stmt));
- } else {
- Statement* const ident_cond{pool.Create(Identity{}, cond)};
- const Node true_label{labels_map.at(block->TrueBranch())};
- const Node false_label{labels_map.at(block->FalseBranch())};
- Statement* goto_true{pool.Create(Goto{}, ident_cond, true_label, &root_stmt)};
- Statement* goto_false{pool.Create(Goto{}, true_cond, false_label, &root_stmt)};
- gotos.push_back(root.insert(insert_point, *goto_true));
- gotos.push_back(root.insert(insert_point, *goto_false));
- }
- }
- return gotos;
- }
-
- std::unordered_map<const Block*, Node> BuildLabels(std::span<Block* const> blocks) {
- // TODO: Consider storing labels intrusively inside the block
- std::unordered_map<const Block*, Node> labels_map;
- Tree& root{root_stmt.children};
- u32 label_id{0};
- for (const Block* const block : blocks) {
- Statement* const label{pool.Create(Label{}, label_id, &root_stmt)};
- labels_map.emplace(block, root.insert(root.end(), *label));
- Statement* const false_stmt{pool.Create(Identity{}, Condition{false})};
- root.push_back(*pool.Create(SetVariable{}, label_id, false_stmt, &root_stmt));
- root.push_front(*pool.Create(SetVariable{}, label_id, false_stmt, &root_stmt));
- ++label_id;
- }
- return labels_map;
- }
-
- void UpdateTreeUp(Statement* tree) {
- for (Statement& stmt : tree->children) {
- stmt.up = tree;
- }
- }
-
- void EliminateAsConditional(Node goto_stmt, Node label_stmt) {
- Tree& body{goto_stmt->up->children};
- Tree if_body;
- if_body.splice(if_body.begin(), body, std::next(goto_stmt), label_stmt);
- Statement* const cond{pool.Create(Not{}, goto_stmt->cond)};
- Statement* const if_stmt{pool.Create(If{}, cond, std::move(if_body), goto_stmt->up)};
- UpdateTreeUp(if_stmt);
- body.insert(goto_stmt, *if_stmt);
- body.erase(goto_stmt);
- }
-
- void EliminateAsLoop(Node goto_stmt, Node label_stmt) {
- Tree& body{goto_stmt->up->children};
- Tree loop_body;
- loop_body.splice(loop_body.begin(), body, label_stmt, goto_stmt);
- Statement* const cond{goto_stmt->cond};
- Statement* const loop{pool.Create(Loop{}, cond, std::move(loop_body), goto_stmt->up)};
- UpdateTreeUp(loop);
- body.insert(goto_stmt, *loop);
- body.erase(goto_stmt);
- }
-
- [[nodiscard]] Node MoveOutward(Node goto_stmt) {
- switch (goto_stmt->up->type) {
- case StatementType::If:
- return MoveOutwardIf(goto_stmt);
- case StatementType::Loop:
- return MoveOutwardLoop(goto_stmt);
- default:
- throw LogicError("Invalid outward movement");
- }
- }
-
- [[nodiscard]] Node MoveInward(Node goto_stmt) {
- Statement* const parent{goto_stmt->up};
- Tree& body{parent->children};
- const Node label_nested_stmt{FindStatementWithLabel(body, goto_stmt)};
- const Node label{goto_stmt->label};
- const u32 label_id{label->id};
-
- Statement* const goto_cond{goto_stmt->cond};
- Statement* const set_var{pool.Create(SetVariable{}, label_id, goto_cond, parent)};
- body.insert(goto_stmt, *set_var);
-
- Tree if_body;
- if_body.splice(if_body.begin(), body, std::next(goto_stmt), label_nested_stmt);
- Statement* const variable{pool.Create(Variable{}, label_id)};
- Statement* const neg_var{pool.Create(Not{}, variable)};
- if (!if_body.empty()) {
- Statement* const if_stmt{pool.Create(If{}, neg_var, std::move(if_body), parent)};
- UpdateTreeUp(if_stmt);
- body.insert(goto_stmt, *if_stmt);
- }
- body.erase(goto_stmt);
-
- switch (label_nested_stmt->type) {
- case StatementType::If:
- // Update nested if condition
- label_nested_stmt->cond = pool.Create(Or{}, variable, label_nested_stmt->cond);
- break;
- case StatementType::Loop:
- break;
- default:
- throw LogicError("Invalid inward movement");
- }
- Tree& nested_tree{label_nested_stmt->children};
- Statement* const new_goto{pool.Create(Goto{}, variable, label, &*label_nested_stmt)};
- return nested_tree.insert(nested_tree.begin(), *new_goto);
- }
-
- [[nodiscard]] Node Lift(Node goto_stmt) {
- Statement* const parent{goto_stmt->up};
- Tree& body{parent->children};
- const Node label{goto_stmt->label};
- const u32 label_id{label->id};
- const Node label_nested_stmt{FindStatementWithLabel(body, goto_stmt)};
- const auto type{label_nested_stmt->type};
-
- Tree loop_body;
- loop_body.splice(loop_body.begin(), body, label_nested_stmt, goto_stmt);
- SanitizeNoBreaks(loop_body);
- Statement* const variable{pool.Create(Variable{}, label_id)};
- Statement* const loop_stmt{pool.Create(Loop{}, variable, std::move(loop_body), parent)};
- UpdateTreeUp(loop_stmt);
- const Node loop_node{body.insert(goto_stmt, *loop_stmt)};
-
- Statement* const new_goto{pool.Create(Goto{}, variable, label, loop_stmt)};
- loop_stmt->children.push_front(*new_goto);
- const Node new_goto_node{loop_stmt->children.begin()};
-
- Statement* const set_var{pool.Create(SetVariable{}, label_id, goto_stmt->cond, loop_stmt)};
- loop_stmt->children.push_back(*set_var);
-
- body.erase(goto_stmt);
- return new_goto_node;
- }
-
- Node MoveOutwardIf(Node goto_stmt) {
- const Node parent{Tree::s_iterator_to(*goto_stmt->up)};
- Tree& body{parent->children};
- const u32 label_id{goto_stmt->label->id};
- Statement* const goto_cond{goto_stmt->cond};
- Statement* const set_goto_var{pool.Create(SetVariable{}, label_id, goto_cond, &*parent)};
- body.insert(goto_stmt, *set_goto_var);
-
- Tree if_body;
- if_body.splice(if_body.begin(), body, std::next(goto_stmt), body.end());
- if_body.pop_front();
- Statement* const cond{pool.Create(Variable{}, label_id)};
- Statement* const neg_cond{pool.Create(Not{}, cond)};
- Statement* const if_stmt{pool.Create(If{}, neg_cond, std::move(if_body), &*parent)};
- UpdateTreeUp(if_stmt);
- body.insert(goto_stmt, *if_stmt);
-
- body.erase(goto_stmt);
-
- Statement* const new_cond{pool.Create(Variable{}, label_id)};
- Statement* const new_goto{pool.Create(Goto{}, new_cond, goto_stmt->label, parent->up)};
- Tree& parent_tree{parent->up->children};
- return parent_tree.insert(std::next(parent), *new_goto);
- }
-
- Node MoveOutwardLoop(Node goto_stmt) {
- Statement* const parent{goto_stmt->up};
- Tree& body{parent->children};
- const u32 label_id{goto_stmt->label->id};
- Statement* const goto_cond{goto_stmt->cond};
- Statement* const set_goto_var{pool.Create(SetVariable{}, label_id, goto_cond, parent)};
- Statement* const cond{pool.Create(Variable{}, label_id)};
- Statement* const break_stmt{pool.Create(Break{}, cond, parent)};
- body.insert(goto_stmt, *set_goto_var);
- body.insert(goto_stmt, *break_stmt);
- body.erase(goto_stmt);
-
- const Node loop{Tree::s_iterator_to(*goto_stmt->up)};
- Statement* const new_goto_cond{pool.Create(Variable{}, label_id)};
- Statement* const new_goto{pool.Create(Goto{}, new_goto_cond, goto_stmt->label, loop->up)};
- Tree& parent_tree{loop->up->children};
- return parent_tree.insert(std::next(loop), *new_goto);
- }
-
- size_t Offset(ConstNode stmt) const {
- size_t offset{0};
- if (!SearchNode(root_stmt.children, stmt, offset)) {
- throw LogicError("Node not found in tree");
- }
- return offset;
- }
-
- ObjectPool<Statement>& pool;
- Statement root_stmt{FunctionTag{}};
-};
-
-Block* TryFindForwardBlock(const Statement& stmt) {
- const Tree& tree{stmt.up->children};
- const ConstNode end{tree.cend()};
- ConstNode forward_node{std::next(Tree::s_iterator_to(stmt))};
- while (forward_node != end && !HasChildren(forward_node->type)) {
- if (forward_node->type == StatementType::Code) {
- return forward_node->code;
- }
- ++forward_node;
- }
- return nullptr;
-}
-
-[[nodiscard]] U1 VisitExpr(IREmitter& ir, const Statement& stmt) {
- switch (stmt.type) {
- case StatementType::Identity:
- return ir.Condition(stmt.guest_cond);
- case StatementType::Not:
- return ir.LogicalNot(U1{VisitExpr(ir, *stmt.op)});
- case StatementType::Or:
- return ir.LogicalOr(VisitExpr(ir, *stmt.op_a), VisitExpr(ir, *stmt.op_b));
- case StatementType::Variable:
- return ir.GetGotoVariable(stmt.id);
- default:
- throw NotImplementedException("Statement type {}", stmt.type);
- }
-}
-
-class TranslatePass {
-public:
- TranslatePass(ObjectPool<Inst>& inst_pool_, ObjectPool<Block>& block_pool_,
- ObjectPool<Statement>& stmt_pool_, Statement& root_stmt,
- const std::function<void(IR::Block*)>& func_, BlockList& block_list_)
- : stmt_pool{stmt_pool_}, inst_pool{inst_pool_}, block_pool{block_pool_}, func{func_},
- block_list{block_list_} {
- Visit(root_stmt, nullptr, nullptr);
- }
-
-private:
- void Visit(Statement& parent, Block* continue_block, Block* break_block) {
- Tree& tree{parent.children};
- Block* current_block{nullptr};
-
- for (auto it = tree.begin(); it != tree.end(); ++it) {
- Statement& stmt{*it};
- switch (stmt.type) {
- case StatementType::Label:
- // Labels can be ignored
- break;
- case StatementType::Code: {
- if (current_block && current_block != stmt.code) {
- IREmitter ir{*current_block};
- ir.Branch(stmt.code);
- }
- current_block = stmt.code;
- func(stmt.code);
- block_list.push_back(stmt.code);
- break;
- }
- case StatementType::SetVariable: {
- if (!current_block) {
- current_block = MergeBlock(parent, stmt);
- }
- IREmitter ir{*current_block};
- ir.SetGotoVariable(stmt.id, VisitExpr(ir, *stmt.op));
- break;
- }
- case StatementType::If: {
- if (!current_block) {
- current_block = block_pool.Create(inst_pool);
- block_list.push_back(current_block);
- }
- Block* const merge_block{MergeBlock(parent, stmt)};
-
- // Visit children
- const size_t first_block_index{block_list.size()};
- Visit(stmt, merge_block, break_block);
-
- // Implement if header block
- Block* const first_if_block{block_list.at(first_block_index)};
- IREmitter ir{*current_block};
- const U1 cond{VisitExpr(ir, *stmt.cond)};
- ir.SelectionMerge(merge_block);
- ir.BranchConditional(cond, first_if_block, merge_block);
-
- current_block = merge_block;
- break;
- }
- case StatementType::Loop: {
- Block* const loop_header_block{block_pool.Create(inst_pool)};
- if (current_block) {
- IREmitter{*current_block}.Branch(loop_header_block);
- }
- block_list.push_back(loop_header_block);
-
- Block* const new_continue_block{block_pool.Create(inst_pool)};
- Block* const merge_block{MergeBlock(parent, stmt)};
-
- // Visit children
- const size_t first_block_index{block_list.size()};
- Visit(stmt, new_continue_block, merge_block);
-
- // The continue block is located at the end of the loop
- block_list.push_back(new_continue_block);
-
- // Implement loop header block
- Block* const first_loop_block{block_list.at(first_block_index)};
- IREmitter ir{*loop_header_block};
- ir.LoopMerge(merge_block, new_continue_block);
- ir.Branch(first_loop_block);
-
- // Implement continue block
- IREmitter continue_ir{*new_continue_block};
- const U1 continue_cond{VisitExpr(continue_ir, *stmt.cond)};
- continue_ir.BranchConditional(continue_cond, ir.block, merge_block);
-
- current_block = merge_block;
- break;
- }
- case StatementType::Break: {
- if (!current_block) {
- current_block = block_pool.Create(inst_pool);
- block_list.push_back(current_block);
- }
- Block* const skip_block{MergeBlock(parent, stmt)};
-
- IREmitter ir{*current_block};
- ir.BranchConditional(VisitExpr(ir, *stmt.cond), break_block, skip_block);
-
- current_block = skip_block;
- break;
- }
- case StatementType::Return: {
- if (!current_block) {
- current_block = block_pool.Create(inst_pool);
- block_list.push_back(current_block);
- }
- IREmitter{*current_block}.Return();
- current_block = nullptr;
- break;
- }
- default:
- throw NotImplementedException("Statement type {}", stmt.type);
- }
- }
- if (current_block && continue_block) {
- IREmitter ir{*current_block};
- ir.Branch(continue_block);
- }
- }
-
- Block* MergeBlock(Statement& parent, Statement& stmt) {
- if (Block* const block{TryFindForwardBlock(stmt)}) {
- return block;
- }
- // Create a merge block we can visit later
- Block* const block{block_pool.Create(inst_pool)};
- Statement* const merge_stmt{stmt_pool.Create(block, &parent)};
- parent.children.insert(std::next(Tree::s_iterator_to(stmt)), *merge_stmt);
- return block;
- }
-
- ObjectPool<Statement>& stmt_pool;
- ObjectPool<Inst>& inst_pool;
- ObjectPool<Block>& block_pool;
- const std::function<void(IR::Block*)>& func;
- BlockList& block_list;
-};
-} // Anonymous namespace
-
-BlockList VisitAST(ObjectPool<Inst>& inst_pool, ObjectPool<Block>& block_pool,
- std::span<Block* const> unordered_blocks,
- const std::function<void(Block*)>& func) {
- ObjectPool<Statement> stmt_pool{64};
- GotoPass goto_pass{unordered_blocks, stmt_pool};
- BlockList block_list;
- TranslatePass translate_pass{inst_pool, block_pool, stmt_pool, goto_pass.RootStatement(),
- func, block_list};
- return block_list;
-}
-
-} // namespace Shader::IR
diff --git a/src/shader_recompiler/frontend/ir/structured_control_flow.h b/src/shader_recompiler/frontend/ir/structured_control_flow.h
deleted file mode 100644
index a574c24f77..0000000000
--- a/src/shader_recompiler/frontend/ir/structured_control_flow.h
+++ /dev/null
@@ -1,22 +0,0 @@
-// Copyright 2021 yuzu Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#pragma once
-
-#include <functional>
-#include <span>
-
-#include <boost/intrusive/list.hpp>
-
-#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
-#include "shader_recompiler/object_pool.h"
-
-namespace Shader::IR {
-
-[[nodiscard]] BlockList VisitAST(ObjectPool<Inst>& inst_pool, ObjectPool<Block>& block_pool,
- std::span<Block* const> unordered_blocks,
- const std::function<void(Block*)>& func);
-
-} // namespace Shader::IR
diff --git a/src/shader_recompiler/frontend/maxwell/control_flow.cpp b/src/shader_recompiler/frontend/maxwell/control_flow.cpp
index d0dc663307..715c0e92d8 100644
--- a/src/shader_recompiler/frontend/maxwell/control_flow.cpp
+++ b/src/shader_recompiler/frontend/maxwell/control_flow.cpp
@@ -31,13 +31,12 @@ struct Compare {
return lhs.begin < rhs.begin;
}
};
-} // Anonymous namespace
-static u32 BranchOffset(Location pc, Instruction inst) {
+u32 BranchOffset(Location pc, Instruction inst) {
return pc.Offset() + inst.branch.Offset() + 8;
}
-static void Split(Block* old_block, Block* new_block, Location pc) {
+void Split(Block* old_block, Block* new_block, Location pc) {
if (pc <= old_block->begin || pc >= old_block->end) {
throw InvalidArgument("Invalid address to split={}", pc);
}
@@ -49,21 +48,19 @@ static void Split(Block* old_block, Block* new_block, Location pc) {
.cond{old_block->cond},
.branch_true{old_block->branch_true},
.branch_false{old_block->branch_false},
- .ir{nullptr},
};
*old_block = Block{
.begin{old_block->begin},
.end{pc},
.end_class{EndClass::Branch},
.stack{std::move(old_block->stack)},
- .cond{IR::Condition{true}},
+ .cond{true},
.branch_true{new_block},
.branch_false{nullptr},
- .ir{nullptr},
};
}
-static Token OpcodeToken(Opcode opcode) {
+Token OpcodeToken(Opcode opcode) {
switch (opcode) {
case Opcode::PBK:
case Opcode::BRK:
@@ -89,7 +86,7 @@ static Token OpcodeToken(Opcode opcode) {
}
}
-static bool IsAbsoluteJump(Opcode opcode) {
+bool IsAbsoluteJump(Opcode opcode) {
switch (opcode) {
case Opcode::JCAL:
case Opcode::JMP:
@@ -100,7 +97,7 @@ static bool IsAbsoluteJump(Opcode opcode) {
}
}
-static bool HasFlowTest(Opcode opcode) {
+bool HasFlowTest(Opcode opcode) {
switch (opcode) {
case Opcode::BRA:
case Opcode::BRX:
@@ -121,13 +118,14 @@ static bool HasFlowTest(Opcode opcode) {
}
}
-static std::string NameOf(const Block& block) {
+std::string NameOf(const Block& block) {
if (block.begin.IsVirtual()) {
return fmt::format("\"Virtual {}\"", block.begin);
} else {
return fmt::format("\"{}\"", block.begin);
}
}
+} // Anonymous namespace
void Stack::Push(Token token, Location target) {
entries.push_back({
@@ -166,26 +164,24 @@ bool Block::Contains(Location pc) const noexcept {
return pc >= begin && pc < end;
}
-Function::Function(Location start_address)
+Function::Function(ObjectPool<Block>& block_pool, Location start_address)
: entrypoint{start_address}, labels{{
.address{start_address},
- .block{nullptr},
+ .block{block_pool.Create(Block{
+ .begin{start_address},
+ .end{start_address},
+ .end_class{EndClass::Branch},
+ .stack{},
+ .cond{true},
+ .branch_true{nullptr},
+ .branch_false{nullptr},
+ })},
.stack{},
}} {}
CFG::CFG(Environment& env_, ObjectPool<Block>& block_pool_, Location start_address)
: env{env_}, block_pool{block_pool_} {
- functions.emplace_back(start_address);
- functions.back().labels.back().block = block_pool.Create(Block{
- .begin{start_address},
- .end{start_address},
- .end_class{EndClass::Branch},
- .stack{},
- .cond{IR::Condition{true}},
- .branch_true{nullptr},
- .branch_false{nullptr},
- .ir{nullptr},
- });
+ functions.emplace_back(block_pool, start_address);
for (FunctionId function_id = 0; function_id < functions.size(); ++function_id) {
while (!functions[function_id].labels.empty()) {
Function& function{functions[function_id]};
@@ -308,11 +304,17 @@ CFG::AnalysisState CFG::AnalyzeInst(Block* block, FunctionId function_id, Locati
const Location cal_pc{is_absolute ? inst.branch.Absolute() : BranchOffset(pc, inst)};
// Technically CAL pushes into PRET, but that's implicit in the function call for us
// Insert the function into the list if it doesn't exist
- if (std::ranges::find(functions, cal_pc, &Function::entrypoint) == functions.end()) {
- functions.emplace_back(cal_pc);
+ const auto it{std::ranges::find(functions, cal_pc, &Function::entrypoint)};
+ const bool exists{it != functions.end()};
+ const FunctionId call_id{exists ? std::distance(functions.begin(), it) : functions.size()};
+ if (!exists) {
+ functions.emplace_back(block_pool, cal_pc);
}
- // Handle CAL like a regular instruction
- break;
+ block->end_class = EndClass::Call;
+ block->function_call = call_id;
+ block->return_block = AddLabel(block, block->stack, pc + 1, function_id);
+ block->end = pc;
+ return AnalysisState::Branch;
}
default:
break;
@@ -348,7 +350,6 @@ void CFG::AnalyzeCondInst(Block* block, FunctionId function_id, Location pc,
.cond{cond},
.branch_true{conditional_block},
.branch_false{nullptr},
- .ir{nullptr},
};
// Save the contents of the visited block in the conditional block
*conditional_block = std::move(*block);
@@ -401,16 +402,6 @@ void CFG::AnalyzeBRX(Block*, Location, Instruction, bool is_absolute) {
throw NotImplementedException("{}", is_absolute ? "JMX" : "BRX");
}
-void CFG::AnalyzeCAL(Location pc, Instruction inst, bool is_absolute) {
- const Location cal_pc{is_absolute ? inst.branch.Absolute() : BranchOffset(pc, inst)};
- // Technically CAL pushes into PRET, but that's implicit in the function call for us
- // Insert the function to the function list if it doesn't exist
- const auto it{std::ranges::find(functions, cal_pc, &Function::entrypoint)};
- if (it == functions.end()) {
- functions.emplace_back(cal_pc);
- }
-}
-
CFG::AnalysisState CFG::AnalyzeEXIT(Block* block, FunctionId function_id, Location pc,
Instruction inst) {
const IR::FlowTest flow_test{inst.branch.flow_test};
@@ -455,10 +446,9 @@ Block* CFG::AddLabel(Block* block, Stack stack, Location pc, FunctionId function
.end{pc},
.end_class{EndClass::Branch},
.stack{stack},
- .cond{IR::Condition{true}},
+ .cond{true},
.branch_true{nullptr},
.branch_false{nullptr},
- .ir{nullptr},
})};
function.labels.push_back(Label{
.address{pc},
@@ -495,6 +485,14 @@ std::string CFG::Dot() const {
add_branch(block.branch_false, false);
}
break;
+ case EndClass::Call:
+ dot += fmt::format("\t\t{}->N{};\n", name, node_uid);
+ dot += fmt::format("\t\tN{}->{};\n", node_uid, NameOf(*block.return_block));
+ dot += fmt::format("\t\tN{} [label=\"Call {}\"][shape=square][style=stripped];\n",
+ node_uid, block.function_call);
+ dot += '\n';
+ ++node_uid;
+ break;
case EndClass::Exit:
dot += fmt::format("\t\t{}->N{};\n", name, node_uid);
dot += fmt::format("\t\tN{} [label=\"Exit\"][shape=square][style=stripped];\n",
diff --git a/src/shader_recompiler/frontend/maxwell/control_flow.h b/src/shader_recompiler/frontend/maxwell/control_flow.h
index 209c9e5510..fe74f210fb 100644
--- a/src/shader_recompiler/frontend/maxwell/control_flow.h
+++ b/src/shader_recompiler/frontend/maxwell/control_flow.h
@@ -20,16 +20,13 @@
#include "shader_recompiler/frontend/maxwell/opcodes.h"
#include "shader_recompiler/object_pool.h"
-namespace Shader::IR {
-class Block;
-}
-
namespace Shader::Maxwell::Flow {
using FunctionId = size_t;
enum class EndClass {
Branch,
+ Call,
Exit,
Return,
};
@@ -75,9 +72,14 @@ struct Block : boost::intrusive::set_base_hook<
EndClass end_class;
Stack stack;
IR::Condition cond;
- Block* branch_true;
- Block* branch_false;
- IR::Block* ir;
+ union {
+ Block* branch_true;
+ FunctionId function_call;
+ };
+ union {
+ Block* branch_false;
+ Block* return_block;
+ };
};
struct Label {
@@ -87,7 +89,7 @@ struct Label {
};
struct Function {
- Function(Location start_address);
+ explicit Function(ObjectPool<Block>& block_pool, Location start_address);
Location entrypoint;
boost::container::small_vector<Label, 16> labels;
@@ -137,7 +139,6 @@ private:
void AnalyzeBRA(Block* block, FunctionId function_id, Location pc, Instruction inst,
bool is_absolute);
void AnalyzeBRX(Block* block, Location pc, Instruction inst, bool is_absolute);
- void AnalyzeCAL(Location pc, Instruction inst, bool is_absolute);
AnalysisState AnalyzeEXIT(Block* block, FunctionId function_id, Location pc, Instruction inst);
/// Return the branch target block id
diff --git a/src/shader_recompiler/frontend/maxwell/program.cpp b/src/shader_recompiler/frontend/maxwell/program.cpp
index b270bbccdb..8bfa643268 100644
--- a/src/shader_recompiler/frontend/maxwell/program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/program.cpp
@@ -8,67 +8,44 @@
#include "shader_recompiler/frontend/ir/basic_block.h"
#include "shader_recompiler/frontend/ir/post_order.h"
-#include "shader_recompiler/frontend/ir/structured_control_flow.h"
#include "shader_recompiler/frontend/maxwell/program.h"
+#include "shader_recompiler/frontend/maxwell/structured_control_flow.h"
#include "shader_recompiler/frontend/maxwell/translate/translate.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Maxwell {
-namespace {
-IR::BlockList TranslateCode(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
- Environment& env, Flow::Function& cfg_function) {
- const size_t num_blocks{cfg_function.blocks.size()};
- std::vector<IR::Block*> blocks(cfg_function.blocks.size());
- std::ranges::for_each(cfg_function.blocks, [&, i = size_t{0}](auto& cfg_block) mutable {
- const u32 begin{cfg_block.begin.Offset()};
- const u32 end{cfg_block.end.Offset()};
- blocks[i] = block_pool.Create(inst_pool, begin, end);
- cfg_block.ir = blocks[i];
- ++i;
- });
- std::ranges::for_each(cfg_function.blocks, [&, i = size_t{0}](auto& cfg_block) mutable {
- IR::Block* const block{blocks[i]};
- ++i;
- if (cfg_block.end_class != Flow::EndClass::Branch) {
- block->SetReturn();
- } else if (cfg_block.cond == IR::Condition{true}) {
- block->SetBranch(cfg_block.branch_true->ir);
- } else if (cfg_block.cond == IR::Condition{false}) {
- block->SetBranch(cfg_block.branch_false->ir);
- } else {
- block->SetBranches(cfg_block.cond, cfg_block.branch_true->ir,
- cfg_block.branch_false->ir);
- }
+
+static void RemoveUnreachableBlocks(IR::Program& program) {
+ // Some blocks might be unreachable if a function call exists unconditionally
+ // If this happens the number of blocks and post order blocks will mismatch
+ if (program.blocks.size() == program.post_order_blocks.size()) {
+ return;
+ }
+ const IR::BlockList& post_order{program.post_order_blocks};
+ std::erase_if(program.blocks, [&](IR::Block* block) {
+ return std::ranges::find(post_order, block) == post_order.end();
});
- return IR::VisitAST(inst_pool, block_pool, blocks,
- [&](IR::Block* block) { Translate(env, block); });
}
-} // Anonymous namespace
IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
Environment& env, Flow::CFG& cfg) {
IR::Program program;
- auto& functions{program.functions};
- functions.reserve(cfg.Functions().size());
- for (Flow::Function& cfg_function : cfg.Functions()) {
- functions.push_back(IR::Function{
- .blocks{TranslateCode(inst_pool, block_pool, env, cfg_function)},
- .post_order_blocks{},
- });
- }
+ program.blocks = VisitAST(inst_pool, block_pool, env, cfg);
+ program.post_order_blocks = PostOrder(program.blocks);
+ RemoveUnreachableBlocks(program);
+
+ // Replace instructions before the SSA rewrite
Optimization::LowerFp16ToFp32(program);
- for (IR::Function& function : functions) {
- function.post_order_blocks = PostOrder(function.blocks);
- Optimization::SsaRewritePass(function.post_order_blocks);
- }
+
+ Optimization::SsaRewritePass(program);
+
Optimization::GlobalMemoryToStorageBufferPass(program);
Optimization::TexturePass(env, program);
- for (IR::Function& function : functions) {
- Optimization::PostOrderInvoke(Optimization::ConstantPropagationPass, function);
- Optimization::PostOrderInvoke(Optimization::DeadCodeEliminationPass, function);
- Optimization::IdentityRemovalPass(function);
- Optimization::VerificationPass(function);
- }
+
+ Optimization::ConstantPropagationPass(program);
+ Optimization::DeadCodeEliminationPass(program);
+ Optimization::IdentityRemovalPass(program);
+ Optimization::VerificationPass(program);
Optimization::CollectShaderInfoPass(program);
return program;
}
diff --git a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
new file mode 100644
index 0000000000..5f5d9cf173
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
@@ -0,0 +1,770 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include <algorithm>
+#include <memory>
+#include <ranges>
+#include <string>
+#include <unordered_map>
+#include <utility>
+#include <vector>
+
+#include <fmt/format.h>
+
+#include <boost/intrusive/list.hpp>
+
+#include "shader_recompiler/environment.h"
+#include "shader_recompiler/frontend/ir/basic_block.h"
+#include "shader_recompiler/frontend/ir/ir_emitter.h"
+#include "shader_recompiler/frontend/maxwell/structured_control_flow.h"
+#include "shader_recompiler/frontend/maxwell/translate/translate.h"
+#include "shader_recompiler/object_pool.h"
+
+namespace Shader::Maxwell {
+namespace {
+struct Statement;
+
+// Use normal_link because we are not guaranteed to destroy the tree in order
+using ListBaseHook =
+ boost::intrusive::list_base_hook<boost::intrusive::link_mode<boost::intrusive::normal_link>>;
+
+using Tree = boost::intrusive::list<Statement,
+ // Allow using Statement without a definition
+ boost::intrusive::base_hook<ListBaseHook>,
+ // Avoid linear complexity on splice, size is never called
+ boost::intrusive::constant_time_size<false>>;
+using Node = Tree::iterator;
+using ConstNode = Tree::const_iterator;
+
+enum class StatementType {
+ Code,
+ Goto,
+ Label,
+ If,
+ Loop,
+ Break,
+ Return,
+ Function,
+ Identity,
+ Not,
+ Or,
+ SetVariable,
+ Variable,
+};
+
+bool HasChildren(StatementType type) {
+ switch (type) {
+ case StatementType::If:
+ case StatementType::Loop:
+ case StatementType::Function:
+ return true;
+ default:
+ return false;
+ }
+}
+
+struct Goto {};
+struct Label {};
+struct If {};
+struct Loop {};
+struct Break {};
+struct Return {};
+struct FunctionTag {};
+struct Identity {};
+struct Not {};
+struct Or {};
+struct SetVariable {};
+struct Variable {};
+
+#ifdef _MSC_VER
+#pragma warning(push)
+#pragma warning(disable : 26495) // Always initialize a member variable, expected in Statement
+#endif
+struct Statement : ListBaseHook {
+ Statement(IR::Block* code_, Statement* up_) : code{code_}, up{up_}, type{StatementType::Code} {}
+ Statement(Goto, Statement* cond_, Node label_, Statement* up_)
+ : label{label_}, cond{cond_}, up{up_}, type{StatementType::Goto} {}
+ Statement(Label, u32 id_, Statement* up_) : id{id_}, up{up_}, type{StatementType::Label} {}
+ Statement(If, Statement* cond_, Tree&& children_, Statement* up_)
+ : children{std::move(children_)}, cond{cond_}, up{up_}, type{StatementType::If} {}
+ Statement(Loop, Statement* cond_, Tree&& children_, Statement* up_)
+ : children{std::move(children_)}, cond{cond_}, up{up_}, type{StatementType::Loop} {}
+ Statement(Break, Statement* cond_, Statement* up_)
+ : cond{cond_}, up{up_}, type{StatementType::Break} {}
+ Statement(Return) : type{StatementType::Return} {}
+ Statement(FunctionTag) : children{}, type{StatementType::Function} {}
+ Statement(Identity, IR::Condition cond_) : guest_cond{cond_}, type{StatementType::Identity} {}
+ Statement(Not, Statement* op_) : op{op_}, type{StatementType::Not} {}
+ Statement(Or, Statement* op_a_, Statement* op_b_)
+ : op_a{op_a_}, op_b{op_b_}, type{StatementType::Or} {}
+ Statement(SetVariable, u32 id_, Statement* op_, Statement* up_)
+ : op{op_}, id{id_}, up{up_}, type{StatementType::SetVariable} {}
+ Statement(Variable, u32 id_) : id{id_}, type{StatementType::Variable} {}
+
+ ~Statement() {
+ if (HasChildren(type)) {
+ std::destroy_at(&children);
+ }
+ }
+
+ union {
+ IR::Block* code;
+ Node label;
+ Tree children;
+ IR::Condition guest_cond;
+ Statement* op;
+ Statement* op_a;
+ };
+ union {
+ Statement* cond;
+ Statement* op_b;
+ u32 id;
+ };
+ Statement* up{};
+ StatementType type;
+};
+#ifdef _MSC_VER
+#pragma warning(pop)
+#endif
+
+std::string DumpExpr(const Statement* stmt) {
+ switch (stmt->type) {
+ case StatementType::Identity:
+ return fmt::format("{}", stmt->guest_cond);
+ case StatementType::Not:
+ return fmt::format("!{}", DumpExpr(stmt->op));
+ case StatementType::Or:
+ return fmt::format("{} || {}", DumpExpr(stmt->op_a), DumpExpr(stmt->op_b));
+ case StatementType::Variable:
+ return fmt::format("goto_L{}", stmt->id);
+ default:
+ return "<invalid type>";
+ }
+}
+
+std::string DumpTree(const Tree& tree, u32 indentation = 0) {
+ std::string ret;
+ std::string indent(indentation, ' ');
+ for (auto stmt = tree.begin(); stmt != tree.end(); ++stmt) {
+ switch (stmt->type) {
+ case StatementType::Code:
+ ret += fmt::format("{} Block {:04x};\n", indent, stmt->code->LocationBegin());
+ break;
+ case StatementType::Goto:
+ ret += fmt::format("{} if ({}) goto L{};\n", indent, DumpExpr(stmt->cond),
+ stmt->label->id);
+ break;
+ case StatementType::Label:
+ ret += fmt::format("{}L{}:\n", indent, stmt->id);
+ break;
+ case StatementType::If:
+ ret += fmt::format("{} if ({}) {{\n", indent, DumpExpr(stmt->cond));
+ ret += DumpTree(stmt->children, indentation + 4);
+ ret += fmt::format("{} }}\n", indent);
+ break;
+ case StatementType::Loop:
+ ret += fmt::format("{} do {{\n", indent);
+ ret += DumpTree(stmt->children, indentation + 4);
+ ret += fmt::format("{} }} while ({});\n", indent, DumpExpr(stmt->cond));
+ break;
+ case StatementType::Break:
+ ret += fmt::format("{} if ({}) break;\n", indent, DumpExpr(stmt->cond));
+ break;
+ case StatementType::Return:
+ ret += fmt::format("{} return;\n", indent);
+ break;
+ case StatementType::SetVariable:
+ ret += fmt::format("{} goto_L{} = {};\n", indent, stmt->id, DumpExpr(stmt->op));
+ break;
+ case StatementType::Function:
+ case StatementType::Identity:
+ case StatementType::Not:
+ case StatementType::Or:
+ case StatementType::Variable:
+ throw LogicError("Statement can't be printed");
+ }
+ }
+ return ret;
+}
+
+bool HasNode(const Tree& tree, ConstNode stmt) {
+ const auto end{tree.end()};
+ for (auto it = tree.begin(); it != end; ++it) {
+ if (it == stmt || (HasChildren(it->type) && HasNode(it->children, stmt))) {
+ return true;
+ }
+ }
+ return false;
+}
+
+Node FindStatementWithLabel(Tree& tree, ConstNode goto_stmt) {
+ const ConstNode label_stmt{goto_stmt->label};
+ const ConstNode end{tree.end()};
+ for (auto it = tree.begin(); it != end; ++it) {
+ if (it == label_stmt || (HasChildren(it->type) && HasNode(it->children, label_stmt))) {
+ return it;
+ }
+ }
+ throw LogicError("Lift label not in tree");
+}
+
+void SanitizeNoBreaks(const Tree& tree) {
+ if (std::ranges::find(tree, StatementType::Break, &Statement::type) != tree.end()) {
+ throw NotImplementedException("Capturing statement with break nodes");
+ }
+}
+
+size_t Level(Node stmt) {
+ size_t level{0};
+ Statement* node{stmt->up};
+ while (node) {
+ ++level;
+ node = node->up;
+ }
+ return level;
+}
+
+bool IsDirectlyRelated(Node goto_stmt, Node label_stmt) {
+ const size_t goto_level{Level(goto_stmt)};
+ const size_t label_level{Level(label_stmt)};
+ size_t min_level;
+ size_t max_level;
+ Node min;
+ Node max;
+ if (label_level < goto_level) {
+ min_level = label_level;
+ max_level = goto_level;
+ min = label_stmt;
+ max = goto_stmt;
+ } else { // goto_level < label_level
+ min_level = goto_level;
+ max_level = label_level;
+ min = goto_stmt;
+ max = label_stmt;
+ }
+ while (max_level > min_level) {
+ --max_level;
+ max = max->up;
+ }
+ return min->up == max->up;
+}
+
+bool IsIndirectlyRelated(Node goto_stmt, Node label_stmt) {
+ return goto_stmt->up != label_stmt->up && !IsDirectlyRelated(goto_stmt, label_stmt);
+}
+
+bool SearchNode(const Tree& tree, ConstNode stmt, size_t& offset) {
+ ++offset;
+
+ const auto end = tree.end();
+ for (ConstNode it = tree.begin(); it != end; ++it) {
+ ++offset;
+ if (stmt == it) {
+ return true;
+ }
+ if (HasChildren(it->type) && SearchNode(it->children, stmt, offset)) {
+ return true;
+ }
+ }
+ return false;
+}
+
+class GotoPass {
+public:
+ explicit GotoPass(Flow::CFG& cfg, ObjectPool<IR::Inst>& inst_pool_,
+ ObjectPool<IR::Block>& block_pool_, ObjectPool<Statement>& stmt_pool)
+ : inst_pool{inst_pool_}, block_pool{block_pool_}, pool{stmt_pool} {
+ std::vector gotos{BuildTree(cfg)};
+ for (const Node& goto_stmt : gotos | std::views::reverse) {
+ RemoveGoto(goto_stmt);
+ }
+ }
+
+ Statement& RootStatement() noexcept {
+ return root_stmt;
+ }
+
+private:
+ void RemoveGoto(Node goto_stmt) {
+ // Force goto_stmt and label_stmt to be directly related
+ const Node label_stmt{goto_stmt->label};
+ if (IsIndirectlyRelated(goto_stmt, label_stmt)) {
+ // Move goto_stmt out using outward-movement transformation until it becomes
+ // directly related to label_stmt
+ while (!IsDirectlyRelated(goto_stmt, label_stmt)) {
+ goto_stmt = MoveOutward(goto_stmt);
+ }
+ }
+ // Force goto_stmt and label_stmt to be siblings
+ if (IsDirectlyRelated(goto_stmt, label_stmt)) {
+ const size_t label_level{Level(label_stmt)};
+ size_t goto_level{Level(goto_stmt)};
+ if (goto_level > label_level) {
+ // Move goto_stmt out of its level using outward-movement transformations
+ while (goto_level > label_level) {
+ goto_stmt = MoveOutward(goto_stmt);
+ --goto_level;
+ }
+ } else { // Level(goto_stmt) < Level(label_stmt)
+ if (Offset(goto_stmt) > Offset(label_stmt)) {
+ // Lift goto_stmt to above stmt containing label_stmt using goto-lifting
+ // transformations
+ goto_stmt = Lift(goto_stmt);
+ }
+ // Move goto_stmt into label_stmt's level using inward-movement transformation
+ while (goto_level < label_level) {
+ goto_stmt = MoveInward(goto_stmt);
+ ++goto_level;
+ }
+ }
+ }
+ // TODO: Remove this
+ {
+ Node it{goto_stmt};
+ bool sibling{false};
+ do {
+ sibling |= it == label_stmt;
+ --it;
+ } while (it != goto_stmt->up->children.begin());
+ while (it != goto_stmt->up->children.end()) {
+ sibling |= it == label_stmt;
+ ++it;
+ }
+ if (!sibling) {
+ throw LogicError("Not siblings");
+ }
+ }
+ // goto_stmt and label_stmt are guaranteed to be siblings, eliminate
+ if (std::next(goto_stmt) == label_stmt) {
+ // Simply eliminate the goto if the label is next to it
+ goto_stmt->up->children.erase(goto_stmt);
+ } else if (Offset(goto_stmt) < Offset(label_stmt)) {
+ // Eliminate goto_stmt with a conditional
+ EliminateAsConditional(goto_stmt, label_stmt);
+ } else {
+ // Eliminate goto_stmt with a loop
+ EliminateAsLoop(goto_stmt, label_stmt);
+ }
+ }
+
+ std::vector<Node> BuildTree(Flow::CFG& cfg) {
+ u32 label_id{0};
+ std::vector<Node> gotos;
+ Flow::Function& first_function{cfg.Functions().front()};
+ BuildTree(cfg, first_function, label_id, gotos, root_stmt.children.end(), std::nullopt);
+ return gotos;
+ }
+
+ void BuildTree(Flow::CFG& cfg, Flow::Function& function, u32& label_id,
+ std::vector<Node>& gotos, Node function_insert_point,
+ std::optional<Node> return_label) {
+ Statement* const false_stmt{pool.Create(Identity{}, IR::Condition{false})};
+ Tree& root{root_stmt.children};
+ std::unordered_map<Flow::Block*, Node> local_labels;
+ local_labels.reserve(function.blocks.size());
+
+ for (Flow::Block& block : function.blocks) {
+ Statement* const label{pool.Create(Label{}, label_id, &root_stmt)};
+ const Node label_it{root.insert(function_insert_point, *label)};
+ local_labels.emplace(&block, label_it);
+ ++label_id;
+ }
+ for (Flow::Block& block : function.blocks) {
+ const Node label{local_labels.at(&block)};
+ // Insertion point
+ const Node ip{std::next(label)};
+
+ // Reset goto variables before the first block and after its respective label
+ const auto make_reset_variable{[&]() -> Statement& {
+ return *pool.Create(SetVariable{}, label->id, false_stmt, &root_stmt);
+ }};
+ root.push_front(make_reset_variable());
+ root.insert(ip, make_reset_variable());
+
+ const u32 begin_offset{block.begin.Offset()};
+ const u32 end_offset{block.end.Offset()};
+ IR::Block* const ir_block{block_pool.Create(inst_pool, begin_offset, end_offset)};
+ root.insert(ip, *pool.Create(ir_block, &root_stmt));
+
+ switch (block.end_class) {
+ case Flow::EndClass::Branch: {
+ Statement* const always_cond{pool.Create(Identity{}, IR::Condition{true})};
+ if (block.cond == IR::Condition{true}) {
+ const Node true_label{local_labels.at(block.branch_true)};
+ gotos.push_back(
+ root.insert(ip, *pool.Create(Goto{}, always_cond, true_label, &root_stmt)));
+ } else if (block.cond == IR::Condition{false}) {
+ const Node false_label{local_labels.at(block.branch_false)};
+ gotos.push_back(root.insert(
+ ip, *pool.Create(Goto{}, always_cond, false_label, &root_stmt)));
+ } else {
+ const Node true_label{local_labels.at(block.branch_true)};
+ const Node false_label{local_labels.at(block.branch_false)};
+ Statement* const true_cond{pool.Create(Identity{}, block.cond)};
+ gotos.push_back(
+ root.insert(ip, *pool.Create(Goto{}, true_cond, true_label, &root_stmt)));
+ gotos.push_back(root.insert(
+ ip, *pool.Create(Goto{}, always_cond, false_label, &root_stmt)));
+ }
+ break;
+ }
+ case Flow::EndClass::Call: {
+ Flow::Function& call{cfg.Functions()[block.function_call]};
+ const Node call_return_label{local_labels.at(block.return_block)};
+ BuildTree(cfg, call, label_id, gotos, ip, call_return_label);
+ break;
+ }
+ case Flow::EndClass::Exit:
+ root.insert(ip, *pool.Create(Return{}));
+ break;
+ case Flow::EndClass::Return: {
+ Statement* const always_cond{pool.Create(Identity{}, block.cond)};
+ auto goto_stmt{pool.Create(Goto{}, always_cond, return_label.value(), &root_stmt)};
+ gotos.push_back(root.insert(ip, *goto_stmt));
+ break;
+ }
+ }
+ }
+ }
+
+ void UpdateTreeUp(Statement* tree) {
+ for (Statement& stmt : tree->children) {
+ stmt.up = tree;
+ }
+ }
+
+ void EliminateAsConditional(Node goto_stmt, Node label_stmt) {
+ Tree& body{goto_stmt->up->children};
+ Tree if_body;
+ if_body.splice(if_body.begin(), body, std::next(goto_stmt), label_stmt);
+ Statement* const cond{pool.Create(Not{}, goto_stmt->cond)};
+ Statement* const if_stmt{pool.Create(If{}, cond, std::move(if_body), goto_stmt->up)};
+ UpdateTreeUp(if_stmt);
+ body.insert(goto_stmt, *if_stmt);
+ body.erase(goto_stmt);
+ }
+
+ void EliminateAsLoop(Node goto_stmt, Node label_stmt) {
+ Tree& body{goto_stmt->up->children};
+ Tree loop_body;
+ loop_body.splice(loop_body.begin(), body, label_stmt, goto_stmt);
+ Statement* const cond{goto_stmt->cond};
+ Statement* const loop{pool.Create(Loop{}, cond, std::move(loop_body), goto_stmt->up)};
+ UpdateTreeUp(loop);
+ body.insert(goto_stmt, *loop);
+ body.erase(goto_stmt);
+ }
+
+ [[nodiscard]] Node MoveOutward(Node goto_stmt) {
+ switch (goto_stmt->up->type) {
+ case StatementType::If:
+ return MoveOutwardIf(goto_stmt);
+ case StatementType::Loop:
+ return MoveOutwardLoop(goto_stmt);
+ default:
+ throw LogicError("Invalid outward movement");
+ }
+ }
+
+ [[nodiscard]] Node MoveInward(Node goto_stmt) {
+ Statement* const parent{goto_stmt->up};
+ Tree& body{parent->children};
+ const Node label_nested_stmt{FindStatementWithLabel(body, goto_stmt)};
+ const Node label{goto_stmt->label};
+ const u32 label_id{label->id};
+
+ Statement* const goto_cond{goto_stmt->cond};
+ Statement* const set_var{pool.Create(SetVariable{}, label_id, goto_cond, parent)};
+ body.insert(goto_stmt, *set_var);
+
+ Tree if_body;
+ if_body.splice(if_body.begin(), body, std::next(goto_stmt), label_nested_stmt);
+ Statement* const variable{pool.Create(Variable{}, label_id)};
+ Statement* const neg_var{pool.Create(Not{}, variable)};
+ if (!if_body.empty()) {
+ Statement* const if_stmt{pool.Create(If{}, neg_var, std::move(if_body), parent)};
+ UpdateTreeUp(if_stmt);
+ body.insert(goto_stmt, *if_stmt);
+ }
+ body.erase(goto_stmt);
+
+ switch (label_nested_stmt->type) {
+ case StatementType::If:
+ // Update nested if condition
+ label_nested_stmt->cond = pool.Create(Or{}, variable, label_nested_stmt->cond);
+ break;
+ case StatementType::Loop:
+ break;
+ default:
+ throw LogicError("Invalid inward movement");
+ }
+ Tree& nested_tree{label_nested_stmt->children};
+ Statement* const new_goto{pool.Create(Goto{}, variable, label, &*label_nested_stmt)};
+ return nested_tree.insert(nested_tree.begin(), *new_goto);
+ }
+
+ [[nodiscard]] Node Lift(Node goto_stmt) {
+ Statement* const parent{goto_stmt->up};
+ Tree& body{parent->children};
+ const Node label{goto_stmt->label};
+ const u32 label_id{label->id};
+ const Node label_nested_stmt{FindStatementWithLabel(body, goto_stmt)};
+ const auto type{label_nested_stmt->type};
+
+ Tree loop_body;
+ loop_body.splice(loop_body.begin(), body, label_nested_stmt, goto_stmt);
+ SanitizeNoBreaks(loop_body);
+ Statement* const variable{pool.Create(Variable{}, label_id)};
+ Statement* const loop_stmt{pool.Create(Loop{}, variable, std::move(loop_body), parent)};
+ UpdateTreeUp(loop_stmt);
+ const Node loop_node{body.insert(goto_stmt, *loop_stmt)};
+
+ Statement* const new_goto{pool.Create(Goto{}, variable, label, loop_stmt)};
+ loop_stmt->children.push_front(*new_goto);
+ const Node new_goto_node{loop_stmt->children.begin()};
+
+ Statement* const set_var{pool.Create(SetVariable{}, label_id, goto_stmt->cond, loop_stmt)};
+ loop_stmt->children.push_back(*set_var);
+
+ body.erase(goto_stmt);
+ return new_goto_node;
+ }
+
+ Node MoveOutwardIf(Node goto_stmt) {
+ const Node parent{Tree::s_iterator_to(*goto_stmt->up)};
+ Tree& body{parent->children};
+ const u32 label_id{goto_stmt->label->id};
+ Statement* const goto_cond{goto_stmt->cond};
+ Statement* const set_goto_var{pool.Create(SetVariable{}, label_id, goto_cond, &*parent)};
+ body.insert(goto_stmt, *set_goto_var);
+
+ Tree if_body;
+ if_body.splice(if_body.begin(), body, std::next(goto_stmt), body.end());
+ if_body.pop_front();
+ Statement* const cond{pool.Create(Variable{}, label_id)};
+ Statement* const neg_cond{pool.Create(Not{}, cond)};
+ Statement* const if_stmt{pool.Create(If{}, neg_cond, std::move(if_body), &*parent)};
+ UpdateTreeUp(if_stmt);
+ body.insert(goto_stmt, *if_stmt);
+
+ body.erase(goto_stmt);
+
+ Statement* const new_cond{pool.Create(Variable{}, label_id)};
+ Statement* const new_goto{pool.Create(Goto{}, new_cond, goto_stmt->label, parent->up)};
+ Tree& parent_tree{parent->up->children};
+ return parent_tree.insert(std::next(parent), *new_goto);
+ }
+
+ Node MoveOutwardLoop(Node goto_stmt) {
+ Statement* const parent{goto_stmt->up};
+ Tree& body{parent->children};
+ const u32 label_id{goto_stmt->label->id};
+ Statement* const goto_cond{goto_stmt->cond};
+ Statement* const set_goto_var{pool.Create(SetVariable{}, label_id, goto_cond, parent)};
+ Statement* const cond{pool.Create(Variable{}, label_id)};
+ Statement* const break_stmt{pool.Create(Break{}, cond, parent)};
+ body.insert(goto_stmt, *set_goto_var);
+ body.insert(goto_stmt, *break_stmt);
+ body.erase(goto_stmt);
+
+ const Node loop{Tree::s_iterator_to(*goto_stmt->up)};
+ Statement* const new_goto_cond{pool.Create(Variable{}, label_id)};
+ Statement* const new_goto{pool.Create(Goto{}, new_goto_cond, goto_stmt->label, loop->up)};
+ Tree& parent_tree{loop->up->children};
+ return parent_tree.insert(std::next(loop), *new_goto);
+ }
+
+ size_t Offset(ConstNode stmt) const {
+ size_t offset{0};
+ if (!SearchNode(root_stmt.children, stmt, offset)) {
+ throw LogicError("Node not found in tree");
+ }
+ return offset;
+ }
+
+ ObjectPool<IR::Inst>& inst_pool;
+ ObjectPool<IR::Block>& block_pool;
+ ObjectPool<Statement>& pool;
+ Statement root_stmt{FunctionTag{}};
+};
+
+IR::Block* TryFindForwardBlock(const Statement& stmt) {
+ const Tree& tree{stmt.up->children};
+ const ConstNode end{tree.cend()};
+ ConstNode forward_node{std::next(Tree::s_iterator_to(stmt))};
+ while (forward_node != end && !HasChildren(forward_node->type)) {
+ if (forward_node->type == StatementType::Code) {
+ return forward_node->code;
+ }
+ ++forward_node;
+ }
+ return nullptr;
+}
+
+[[nodiscard]] IR::U1 VisitExpr(IR::IREmitter& ir, const Statement& stmt) {
+ switch (stmt.type) {
+ case StatementType::Identity:
+ return ir.Condition(stmt.guest_cond);
+ case StatementType::Not:
+ return ir.LogicalNot(IR::U1{VisitExpr(ir, *stmt.op)});
+ case StatementType::Or:
+ return ir.LogicalOr(VisitExpr(ir, *stmt.op_a), VisitExpr(ir, *stmt.op_b));
+ case StatementType::Variable:
+ return ir.GetGotoVariable(stmt.id);
+ default:
+ throw NotImplementedException("Statement type {}", stmt.type);
+ }
+}
+
+class TranslatePass {
+public:
+ TranslatePass(ObjectPool<IR::Inst>& inst_pool_, ObjectPool<IR::Block>& block_pool_,
+ ObjectPool<Statement>& stmt_pool_, Environment& env_, Statement& root_stmt,
+ IR::BlockList& block_list_)
+ : stmt_pool{stmt_pool_}, inst_pool{inst_pool_}, block_pool{block_pool_}, env{env_},
+ block_list{block_list_} {
+ Visit(root_stmt, nullptr, nullptr);
+ }
+
+private:
+ void Visit(Statement& parent, IR::Block* continue_block, IR::Block* break_block) {
+ Tree& tree{parent.children};
+ IR::Block* current_block{nullptr};
+
+ for (auto it = tree.begin(); it != tree.end(); ++it) {
+ Statement& stmt{*it};
+ switch (stmt.type) {
+ case StatementType::Label:
+ // Labels can be ignored
+ break;
+ case StatementType::Code: {
+ if (current_block && current_block != stmt.code) {
+ IR::IREmitter{*current_block}.Branch(stmt.code);
+ }
+ current_block = stmt.code;
+ Translate(env, stmt.code);
+ block_list.push_back(stmt.code);
+ break;
+ }
+ case StatementType::SetVariable: {
+ if (!current_block) {
+ current_block = MergeBlock(parent, stmt);
+ }
+ IR::IREmitter ir{*current_block};
+ ir.SetGotoVariable(stmt.id, VisitExpr(ir, *stmt.op));
+ break;
+ }
+ case StatementType::If: {
+ if (!current_block) {
+ current_block = block_pool.Create(inst_pool);
+ block_list.push_back(current_block);
+ }
+ IR::Block* const merge_block{MergeBlock(parent, stmt)};
+
+ // Visit children
+ const size_t first_block_index{block_list.size()};
+ Visit(stmt, merge_block, break_block);
+
+ // Implement if header block
+ IR::Block* const first_if_block{block_list.at(first_block_index)};
+ IR::IREmitter ir{*current_block};
+ const IR::U1 cond{VisitExpr(ir, *stmt.cond)};
+ ir.SelectionMerge(merge_block);
+ ir.BranchConditional(cond, first_if_block, merge_block);
+
+ current_block = merge_block;
+ break;
+ }
+ case StatementType::Loop: {
+ IR::Block* const loop_header_block{block_pool.Create(inst_pool)};
+ if (current_block) {
+ IR::IREmitter{*current_block}.Branch(loop_header_block);
+ }
+ block_list.push_back(loop_header_block);
+
+ IR::Block* const new_continue_block{block_pool.Create(inst_pool)};
+ IR::Block* const merge_block{MergeBlock(parent, stmt)};
+
+ // Visit children
+ const size_t first_block_index{block_list.size()};
+ Visit(stmt, new_continue_block, merge_block);
+
+ // The continue block is located at the end of the loop
+ block_list.push_back(new_continue_block);
+
+ // Implement loop header block
+ IR::Block* const first_loop_block{block_list.at(first_block_index)};
+ IR::IREmitter ir{*loop_header_block};
+ ir.LoopMerge(merge_block, new_continue_block);
+ ir.Branch(first_loop_block);
+
+ // Implement continue block
+ IR::IREmitter continue_ir{*new_continue_block};
+ const IR::U1 continue_cond{VisitExpr(continue_ir, *stmt.cond)};
+ continue_ir.BranchConditional(continue_cond, ir.block, merge_block);
+
+ current_block = merge_block;
+ break;
+ }
+ case StatementType::Break: {
+ if (!current_block) {
+ current_block = block_pool.Create(inst_pool);
+ block_list.push_back(current_block);
+ }
+ IR::Block* const skip_block{MergeBlock(parent, stmt)};
+
+ IR::IREmitter ir{*current_block};
+ ir.BranchConditional(VisitExpr(ir, *stmt.cond), break_block, skip_block);
+
+ current_block = skip_block;
+ break;
+ }
+ case StatementType::Return: {
+ if (!current_block) {
+ current_block = block_pool.Create(inst_pool);
+ block_list.push_back(current_block);
+ }
+ IR::IREmitter{*current_block}.Return();
+ current_block = nullptr;
+ break;
+ }
+ default:
+ throw NotImplementedException("Statement type {}", stmt.type);
+ }
+ }
+ if (current_block && continue_block) {
+ IR::IREmitter{*current_block}.Branch(continue_block);
+ }
+ }
+
+ IR::Block* MergeBlock(Statement& parent, Statement& stmt) {
+ if (IR::Block* const block{TryFindForwardBlock(stmt)}) {
+ return block;
+ }
+ // Create a merge block we can visit later
+ IR::Block* const block{block_pool.Create(inst_pool)};
+ Statement* const merge_stmt{stmt_pool.Create(block, &parent)};
+ parent.children.insert(std::next(Tree::s_iterator_to(stmt)), *merge_stmt);
+ return block;
+ }
+
+ ObjectPool<Statement>& stmt_pool;
+ ObjectPool<IR::Inst>& inst_pool;
+ ObjectPool<IR::Block>& block_pool;
+ Environment& env;
+ IR::BlockList& block_list;
+};
+} // Anonymous namespace
+
+IR::BlockList VisitAST(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
+ Environment& env, Flow::CFG& cfg) {
+ ObjectPool<Statement> stmt_pool{64};
+ GotoPass goto_pass{cfg, inst_pool, block_pool, stmt_pool};
+ Statement& root{goto_pass.RootStatement()};
+ IR::BlockList block_list;
+ TranslatePass{inst_pool, block_pool, stmt_pool, env, root, block_list};
+ return block_list;
+}
+
+} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/structured_control_flow.h b/src/shader_recompiler/frontend/maxwell/structured_control_flow.h
new file mode 100644
index 0000000000..e4797291e2
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/structured_control_flow.h
@@ -0,0 +1,24 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include <functional>
+#include <span>
+
+#include <boost/intrusive/list.hpp>
+
+#include "shader_recompiler/environment.h"
+#include "shader_recompiler/frontend/ir/basic_block.h"
+#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/maxwell/control_flow.h"
+#include "shader_recompiler/object_pool.h"
+
+namespace Shader::Maxwell {
+
+[[nodiscard]] IR::BlockList VisitAST(ObjectPool<IR::Inst>& inst_pool,
+ ObjectPool<IR::Block>& block_pool, Environment& env,
+ Flow::CFG& cfg);
+
+} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index c6253c40c1..45d6f5e060 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -62,7 +62,7 @@ public:
void BRA(u64 insn);
void BRK(u64 insn);
void BRX(u64 insn);
- void CAL(u64 insn);
+ void CAL();
void CCTL(u64 insn);
void CCTLL(u64 insn);
void CONT(u64 insn);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
index 01ecbb4cc7..92da5c7e83 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
@@ -65,8 +65,8 @@ void TranslatorVisitor::BRX(u64) {
ThrowNotImplemented(Opcode::BRX);
}
-void TranslatorVisitor::CAL(u64) {
- ThrowNotImplemented(Opcode::CAL);
+void TranslatorVisitor::CAL() {
+ // CAL is a no-op
}
void TranslatorVisitor::CCTL(u64) {
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index 70d75ad6cc..708b6b2672 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -296,11 +296,9 @@ void Visit(Info& info, IR::Inst& inst) {
void CollectShaderInfoPass(IR::Program& program) {
Info& info{program.info};
- for (IR::Function& function : program.functions) {
- for (IR::Block* const block : function.post_order_blocks) {
- for (IR::Inst& inst : block->Instructions()) {
- Visit(info, inst);
- }
+ for (IR::Block* const block : program.post_order_blocks) {
+ for (IR::Inst& inst : block->Instructions()) {
+ Visit(info, inst);
}
}
}
diff --git a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
index 7ba9ebe9bb..a39db2bf12 100644
--- a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
+++ b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
@@ -371,9 +371,11 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
}
} // Anonymous namespace
-void ConstantPropagationPass(IR::Block& block) {
- for (IR::Inst& inst : block) {
- ConstantPropagation(block, inst);
+void ConstantPropagationPass(IR::Program& program) {
+ for (IR::Block* const block : program.post_order_blocks) {
+ for (IR::Inst& inst : block->Instructions()) {
+ ConstantPropagation(*block, inst);
+ }
}
}
diff --git a/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp b/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
index 132b2012a8..8ad59f42e0 100644
--- a/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
+++ b/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
@@ -10,12 +10,14 @@
namespace Shader::Optimization {
-void DeadCodeEliminationPass(IR::Block& block) {
+void DeadCodeEliminationPass(IR::Program& program) {
// We iterate over the instructions in reverse order.
// This is because removing an instruction reduces the number of uses for earlier instructions.
- for (IR::Inst& inst : block | std::views::reverse) {
- if (!inst.HasUses() && !inst.MayHaveSideEffects()) {
- inst.Invalidate();
+ for (IR::Block* const block : program.post_order_blocks) {
+ for (IR::Inst& inst : block->Instructions() | std::views::reverse) {
+ if (!inst.HasUses() && !inst.MayHaveSideEffects()) {
+ inst.Invalidate();
+ }
}
}
}
diff --git a/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp b/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
index 5d98d278e2..1faa1ec88b 100644
--- a/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
+++ b/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
@@ -351,14 +351,12 @@ void GlobalMemoryToStorageBufferPass(IR::Program& program) {
StorageBufferSet storage_buffers;
StorageInstVector to_replace;
- for (IR::Function& function : program.functions) {
- for (IR::Block* const block : function.post_order_blocks) {
- for (IR::Inst& inst : block->Instructions()) {
- if (!IsGlobalMemory(inst)) {
- continue;
- }
- CollectStorageBuffers(*block, inst, storage_buffers, to_replace);
+ for (IR::Block* const block : program.post_order_blocks) {
+ for (IR::Inst& inst : block->Instructions()) {
+ if (!IsGlobalMemory(inst)) {
+ continue;
}
+ CollectStorageBuffers(*block, inst, storage_buffers, to_replace);
}
}
Info& info{program.info};
diff --git a/src/shader_recompiler/ir_opt/identity_removal_pass.cpp b/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
index 593efde398..8790b48f21 100644
--- a/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
+++ b/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
@@ -10,10 +10,10 @@
namespace Shader::Optimization {
-void IdentityRemovalPass(IR::Function& function) {
+void IdentityRemovalPass(IR::Program& program) {
std::vector<IR::Inst*> to_invalidate;
- for (IR::Block* const block : function.blocks) {
+ for (IR::Block* const block : program.blocks) {
for (auto inst = block->begin(); inst != block->end();) {
const size_t num_args{inst->NumArgs()};
for (size_t i = 0; i < num_args; ++i) {
diff --git a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
index 14a5cb50f2..74acb8bb6b 100644
--- a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
+++ b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
@@ -77,11 +77,9 @@ IR::Opcode Replace(IR::Opcode op) {
} // Anonymous namespace
void LowerFp16ToFp32(IR::Program& program) {
- for (IR::Function& function : program.functions) {
- for (IR::Block* const block : function.blocks) {
- for (IR::Inst& inst : block->Instructions()) {
- inst.ReplaceOpcode(Replace(inst.Opcode()));
- }
+ for (IR::Block* const block : program.blocks) {
+ for (IR::Inst& inst : block->Instructions()) {
+ inst.ReplaceOpcode(Replace(inst.Opcode()));
}
}
}
diff --git a/src/shader_recompiler/ir_opt/passes.h b/src/shader_recompiler/ir_opt/passes.h
index 3b7e7306bb..5c1fc166ce 100644
--- a/src/shader_recompiler/ir_opt/passes.h
+++ b/src/shader_recompiler/ir_opt/passes.h
@@ -8,26 +8,18 @@
#include "shader_recompiler/environment.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/function.h"
#include "shader_recompiler/frontend/ir/program.h"
namespace Shader::Optimization {
-template <typename Func>
-void PostOrderInvoke(Func&& func, IR::Function& function) {
- for (const auto& block : function.post_order_blocks) {
- func(*block);
- }
-}
-
void CollectShaderInfoPass(IR::Program& program);
-void ConstantPropagationPass(IR::Block& block);
-void DeadCodeEliminationPass(IR::Block& block);
+void ConstantPropagationPass(IR::Program& program);
+void DeadCodeEliminationPass(IR::Program& program);
void GlobalMemoryToStorageBufferPass(IR::Program& program);
-void IdentityRemovalPass(IR::Function& function);
+void IdentityRemovalPass(IR::Program& program);
void LowerFp16ToFp32(IR::Program& program);
-void SsaRewritePass(std::span<IR::Block* const> post_order_blocks);
+void SsaRewritePass(IR::Program& program);
void TexturePass(Environment& env, IR::Program& program);
-void VerificationPass(const IR::Function& function);
+void VerificationPass(const IR::Program& program);
} // namespace Shader::Optimization
diff --git a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
index 19d35b1f83..f89fd51c8a 100644
--- a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
+++ b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
@@ -23,7 +23,6 @@
#include <boost/container/flat_set.hpp>
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/function.h"
#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/opcodes.h"
#include "shader_recompiler/frontend/ir/pred.h"
@@ -262,9 +261,9 @@ void VisitBlock(Pass& pass, IR::Block* block) {
}
} // Anonymous namespace
-void SsaRewritePass(std::span<IR::Block* const> post_order_blocks) {
+void SsaRewritePass(IR::Program& program) {
Pass pass;
- for (IR::Block* const block : post_order_blocks | std::views::reverse) {
+ for (IR::Block* const block : program.post_order_blocks | std::views::reverse) {
VisitBlock(pass, block);
}
}
diff --git a/src/shader_recompiler/ir_opt/texture_pass.cpp b/src/shader_recompiler/ir_opt/texture_pass.cpp
index ec802e02c5..de9d633e28 100644
--- a/src/shader_recompiler/ir_opt/texture_pass.cpp
+++ b/src/shader_recompiler/ir_opt/texture_pass.cpp
@@ -164,14 +164,12 @@ private:
void TexturePass(Environment& env, IR::Program& program) {
TextureInstVector to_replace;
- for (IR::Function& function : program.functions) {
- for (IR::Block* const block : function.post_order_blocks) {
- for (IR::Inst& inst : block->Instructions()) {
- if (!IsTextureInstruction(inst)) {
- continue;
- }
- to_replace.push_back(MakeInst(env, block, inst));
+ for (IR::Block* const block : program.post_order_blocks) {
+ for (IR::Inst& inst : block->Instructions()) {
+ if (!IsTextureInstruction(inst)) {
+ continue;
}
+ to_replace.push_back(MakeInst(env, block, inst));
}
}
// Sort instructions to visit textures by constant buffer index, then by offset
diff --git a/src/shader_recompiler/ir_opt/verification_pass.cpp b/src/shader_recompiler/ir_opt/verification_pass.cpp
index 32b56eb57c..4080b37cca 100644
--- a/src/shader_recompiler/ir_opt/verification_pass.cpp
+++ b/src/shader_recompiler/ir_opt/verification_pass.cpp
@@ -11,8 +11,8 @@
namespace Shader::Optimization {
-static void ValidateTypes(const IR::Function& function) {
- for (const auto& block : function.blocks) {
+static void ValidateTypes(const IR::Program& program) {
+ for (const auto& block : program.blocks) {
for (const IR::Inst& inst : *block) {
if (inst.Opcode() == IR::Opcode::Phi) {
// Skip validation on phi nodes
@@ -30,9 +30,9 @@ static void ValidateTypes(const IR::Function& function) {
}
}
-static void ValidateUses(const IR::Function& function) {
+static void ValidateUses(const IR::Program& program) {
std::map<IR::Inst*, int> actual_uses;
- for (const auto& block : function.blocks) {
+ for (const auto& block : program.blocks) {
for (const IR::Inst& inst : *block) {
const size_t num_args{inst.NumArgs()};
for (size_t i = 0; i < num_args; ++i) {
@@ -45,14 +45,14 @@ static void ValidateUses(const IR::Function& function) {
}
for (const auto [inst, uses] : actual_uses) {
if (inst->UseCount() != uses) {
- throw LogicError("Invalid uses in block:" /*, IR::DumpFunction(function)*/);
+ throw LogicError("Invalid uses in block: {}", IR::DumpProgram(program));
}
}
}
-void VerificationPass(const IR::Function& function) {
- ValidateTypes(function);
- ValidateUses(function);
+void VerificationPass(const IR::Program& program) {
+ ValidateTypes(program);
+ ValidateUses(program);
}
} // namespace Shader::Optimization
--
cgit v1.2.3-70-g09d2
From 0bb85f6a753c769266c95c4ba146b25b9eaaaffd Mon Sep 17 00:00:00 2001
From: lat9nq <22451773+lat9nq@users.noreply.github.com>
Date: Mon, 5 Apr 2021 22:25:22 -0400
Subject: shader_recompiler,video_core: Cleanup some GCC and Clang errors
Mostly fixing unused *, implicit conversion, braced scalar init,
fpermissive, and some others.
Some Clang errors likely remain in video_core, and std::ranges is still
a pertinent issue in shader_recompiler
shader_recompiler: cmake: Force bracket depth to 1024 on Clang
Increases the maximum fold expression depth
thread_worker: Include condition_variable
Don't use list initializers in control flow
Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
---
src/common/thread_worker.h | 1 +
src/shader_recompiler/CMakeLists.txt | 2 +
.../backend/spirv/emit_context.cpp | 4 +-
src/shader_recompiler/backend/spirv/emit_spirv.cpp | 19 +--
.../backend/spirv/emit_spirv_image.cpp | 11 +-
.../backend/spirv/emit_spirv_warp.cpp | 2 +-
src/shader_recompiler/file_environment.h | 2 +-
src/shader_recompiler/frontend/ir/attribute.cpp | 4 +-
src/shader_recompiler/frontend/ir/basic_block.cpp | 2 +-
src/shader_recompiler/frontend/ir/condition.cpp | 6 +-
src/shader_recompiler/frontend/ir/condition.h | 4 +-
src/shader_recompiler/frontend/ir/ir_emitter.cpp | 4 +-
.../frontend/ir/microinstruction.cpp | 16 +--
.../frontend/ir/microinstruction.h | 4 +-
src/shader_recompiler/frontend/ir/opcodes.cpp | 2 +-
src/shader_recompiler/frontend/ir/program.cpp | 2 -
src/shader_recompiler/frontend/ir/value.cpp | 4 +-
src/shader_recompiler/frontend/ir/value.h | 2 +-
.../frontend/maxwell/control_flow.cpp | 140 +++++++++------------
src/shader_recompiler/frontend/maxwell/decode.cpp | 10 +-
.../maxwell/indirect_branch_table_track.cpp | 10 +-
.../frontend/maxwell/structured_control_flow.cpp | 3 +-
.../frontend/maxwell/translate/impl/double_add.cpp | 6 +-
.../translate/impl/double_fused_multiply_add.cpp | 6 +-
.../maxwell/translate/impl/double_multiply.cpp | 6 +-
.../maxwell/translate/impl/floating_point_add.cpp | 6 +-
.../translate/impl/floating_point_compare.cpp | 3 +-
.../impl/floating_point_compare_and_set.cpp | 6 +-
.../floating_point_conversion_floating_point.cpp | 6 +-
.../impl/floating_point_conversion_integer.cpp | 11 +-
.../impl/floating_point_fused_multiply_add.cpp | 6 +-
.../translate/impl/floating_point_min_max.cpp | 6 +-
.../translate/impl/floating_point_multiply.cpp | 8 +-
.../impl/floating_point_set_predicate.cpp | 6 +-
.../translate/impl/floating_point_swizzled_add.cpp | 6 +-
.../translate/impl/half_floating_point_add.cpp | 11 +-
.../half_floating_point_fused_multiply_add.cpp | 11 +-
.../impl/half_floating_point_multiply.cpp | 11 +-
.../translate/impl/half_floating_point_set.cpp | 11 +-
.../impl/half_floating_point_set_predicate.cpp | 12 +-
.../frontend/maxwell/translate/impl/impl.cpp | 8 +-
.../maxwell/translate/impl/integer_add.cpp | 1 -
.../impl/integer_floating_point_conversion.cpp | 4 +-
.../maxwell/translate/impl/load_constant.cpp | 2 +-
.../translate/impl/load_store_local_shared.cpp | 9 +-
.../maxwell/translate/impl/load_store_memory.cpp | 4 +-
.../maxwell/translate/impl/texture_fetch.cpp | 2 +-
.../translate/impl/texture_fetch_swizzled.cpp | 2 +-
.../translate/impl/texture_gather_swizzled.cpp | 2 +-
.../translate/impl/texture_load_swizzled.cpp | 2 +-
.../maxwell/translate/impl/texture_query.cpp | 2 +-
.../maxwell/translate/impl/video_set_predicate.cpp | 1 -
.../ir_opt/collect_shader_info_pass.cpp | 20 +--
.../ir_opt/constant_propagation_pass.cpp | 49 ++++----
.../global_memory_to_storage_buffer_pass.cpp | 42 +++----
.../ir_opt/identity_removal_pass.cpp | 3 +-
.../ir_opt/lower_fp16_to_fp32.cpp | 2 +-
src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp | 4 +-
src/shader_recompiler/ir_opt/texture_pass.cpp | 32 ++---
src/shader_recompiler/ir_opt/verification_pass.cpp | 4 +-
src/tests/common/unique_function.cpp | 2 +
src/video_core/CMakeLists.txt | 2 +-
.../renderer_vulkan/vk_graphics_pipeline.cpp | 21 ++--
.../renderer_vulkan/vk_pipeline_cache.cpp | 5 +-
.../renderer_vulkan/vk_render_pass_cache.cpp | 2 -
.../renderer_vulkan/vk_texture_cache.cpp | 2 +-
66 files changed, 308 insertions(+), 313 deletions(-)
(limited to 'src/shader_recompiler/frontend/ir/program.cpp')
diff --git a/src/common/thread_worker.h b/src/common/thread_worker.h
index 0a975a869d..cd0017726f 100644
--- a/src/common/thread_worker.h
+++ b/src/common/thread_worker.h
@@ -5,6 +5,7 @@
#pragma once
#include <atomic>
+#include <condition_variable>
#include <functional>
#include <mutex>
#include <stop_token>
diff --git a/src/shader_recompiler/CMakeLists.txt b/src/shader_recompiler/CMakeLists.txt
index 22639fe132..551bf1c582 100644
--- a/src/shader_recompiler/CMakeLists.txt
+++ b/src/shader_recompiler/CMakeLists.txt
@@ -196,6 +196,8 @@ else()
$<$<CXX_COMPILER_ID:GNU>:-Werror=unused-but-set-parameter>
$<$<CXX_COMPILER_ID:GNU>:-Werror=unused-but-set-variable>
-Werror=unused-variable
+
+ $<$<CXX_COMPILER_ID:Clang>:-fbracket-depth=1024>
)
endif()
diff --git a/src/shader_recompiler/backend/spirv/emit_context.cpp b/src/shader_recompiler/backend/spirv/emit_context.cpp
index b738e00cc2..0c114402b4 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_context.cpp
@@ -4,6 +4,7 @@
#include <algorithm>
#include <array>
+#include <climits>
#include <string_view>
#include <fmt/format.h>
@@ -116,7 +117,8 @@ void VectorTypes::Define(Sirit::Module& sirit_ctx, Id base_type, std::string_vie
const std::string_view def_name_view(
def_name.data(),
fmt::format_to_n(def_name.data(), def_name.size(), "{}x{}", name, i + 1).size);
- defs[i] = sirit_ctx.Name(sirit_ctx.TypeVector(base_type, i + 1), def_name_view);
+ defs[static_cast<size_t>(i)] =
+ sirit_ctx.Name(sirit_ctx.TypeVector(base_type, i + 1), def_name_view);
}
}
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index 32512a0e5f..355cf0ca8a 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -16,7 +16,7 @@
namespace Shader::Backend::SPIRV {
namespace {
template <class Func>
-struct FuncTraits : FuncTraits<Func> {};
+struct FuncTraits {};
template <class ReturnType_, class... Args>
struct FuncTraits<ReturnType_ (*)(Args...)> {
@@ -64,17 +64,20 @@ ArgType Arg(EmitContext& ctx, const IR::Value& arg) {
template <auto func, bool is_first_arg_inst, size_t... I>
void Invoke(EmitContext& ctx, IR::Inst* inst, std::index_sequence<I...>) {
using Traits = FuncTraits<decltype(func)>;
- if constexpr (std::is_same_v<Traits::ReturnType, Id>) {
+ if constexpr (std::is_same_v<typename Traits::ReturnType, Id>) {
if constexpr (is_first_arg_inst) {
- SetDefinition<func>(ctx, inst, inst, Arg<Traits::ArgType<I + 2>>(ctx, inst->Arg(I))...);
+ SetDefinition<func>(
+ ctx, inst, inst,
+ Arg<typename Traits::template ArgType<I + 2>>(ctx, inst->Arg(I))...);
} else {
- SetDefinition<func>(ctx, inst, Arg<Traits::ArgType<I + 1>>(ctx, inst->Arg(I))...);
+ SetDefinition<func>(
+ ctx, inst, Arg<typename Traits::template ArgType<I + 1>>(ctx, inst->Arg(I))...);
}
} else {
if constexpr (is_first_arg_inst) {
- func(ctx, inst, Arg<Traits::ArgType<I + 2>>(ctx, inst->Arg(I))...);
+ func(ctx, inst, Arg<typename Traits::template ArgType<I + 2>>(ctx, inst->Arg(I))...);
} else {
- func(ctx, Arg<Traits::ArgType<I + 1>>(ctx, inst->Arg(I))...);
+ func(ctx, Arg<typename Traits::template ArgType<I + 1>>(ctx, inst->Arg(I))...);
}
}
}
@@ -94,14 +97,14 @@ void Invoke(EmitContext& ctx, IR::Inst* inst) {
}
void EmitInst(EmitContext& ctx, IR::Inst* inst) {
- switch (inst->Opcode()) {
+ switch (inst->GetOpcode()) {
#define OPCODE(name, result_type, ...) \
case IR::Opcode::name: \
return Invoke<&Emit##name>(ctx, inst);
#include "shader_recompiler/frontend/ir/opcodes.inc"
#undef OPCODE
}
- throw LogicError("Invalid opcode {}", inst->Opcode());
+ throw LogicError("Invalid opcode {}", inst->GetOpcode());
}
Id TypeId(const EmitContext& ctx, IR::Type type) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
index f0f8db8c37..815ca62992 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
@@ -43,11 +43,13 @@ public:
// LOG_WARNING("Not all arguments in PTP are immediate, STUBBING");
return;
}
- const IR::Opcode opcode{values[0]->Opcode()};
- if (opcode != values[1]->Opcode() || opcode != IR::Opcode::CompositeConstructU32x4) {
+ const IR::Opcode opcode{values[0]->GetOpcode()};
+ if (opcode != values[1]->GetOpcode() || opcode != IR::Opcode::CompositeConstructU32x4) {
throw LogicError("Invalid PTP arguments");
}
- auto read{[&](int a, int b) { return ctx.Constant(ctx.U32[1], values[a]->Arg(b).U32()); }};
+ auto read{[&](unsigned int a, unsigned int b) {
+ return ctx.Constant(ctx.U32[1], values[a]->Arg(b).U32());
+ }};
const Id offsets{
ctx.ConstantComposite(ctx.TypeArray(ctx.U32[2], ctx.Constant(ctx.U32[1], 4)),
@@ -297,13 +299,14 @@ Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id
Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
const IR::Value& offset, const IR::Value& offset2, Id dref) {
- const auto info{inst->Flags<IR::TextureInstInfo>()};
const ImageOperands operands(ctx, offset, offset2);
return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst,
ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
}
+#ifdef _WIN32
#pragma optimize("", off)
+#endif
Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
Id lod, Id ms) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp
index c57bd291db..12a03ed6ed 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp
@@ -7,7 +7,7 @@
namespace Shader::Backend::SPIRV {
namespace {
Id WarpExtract(EmitContext& ctx, Id value) {
- const Id shift{ctx.Constant(ctx.U32[1], 5)};
+ [[maybe_unused]] const Id shift{ctx.Constant(ctx.U32[1], 5)};
const Id local_index{ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id)};
return ctx.OpVectorExtractDynamic(ctx.U32[1], value, local_index);
}
diff --git a/src/shader_recompiler/file_environment.h b/src/shader_recompiler/file_environment.h
index 17640a6229..71601f8fd6 100644
--- a/src/shader_recompiler/file_environment.h
+++ b/src/shader_recompiler/file_environment.h
@@ -7,7 +7,7 @@
namespace Shader {
-class FileEnvironment final : public Environment {
+class FileEnvironment : public Environment {
public:
explicit FileEnvironment(const char* path);
~FileEnvironment() override;
diff --git a/src/shader_recompiler/frontend/ir/attribute.cpp b/src/shader_recompiler/frontend/ir/attribute.cpp
index 4811242ea0..7993e5c436 100644
--- a/src/shader_recompiler/frontend/ir/attribute.cpp
+++ b/src/shader_recompiler/frontend/ir/attribute.cpp
@@ -17,7 +17,7 @@ u32 GenericAttributeIndex(Attribute attribute) {
if (!IsGeneric(attribute)) {
throw InvalidArgument("Attribute is not generic {}", attribute);
}
- return (static_cast<int>(attribute) - static_cast<int>(Attribute::Generic0X)) / 4;
+ return (static_cast<u32>(attribute) - static_cast<u32>(Attribute::Generic0X)) / 4u;
}
std::string NameOf(Attribute attribute) {
@@ -444,4 +444,4 @@ std::string NameOf(Attribute attribute) {
return fmt::format("<reserved attribute {}>", static_cast<int>(attribute));
}
-} // namespace Shader::IR
\ No newline at end of file
+} // namespace Shader::IR
diff --git a/src/shader_recompiler/frontend/ir/basic_block.cpp b/src/shader_recompiler/frontend/ir/basic_block.cpp
index ec029dfd6e..e1f0191f40 100644
--- a/src/shader_recompiler/frontend/ir/basic_block.cpp
+++ b/src/shader_recompiler/frontend/ir/basic_block.cpp
@@ -155,7 +155,7 @@ std::string DumpBlock(const Block& block, const std::map<const Block*, size_t>&
ret += fmt::format(": begin={:04x} end={:04x}\n", block.LocationBegin(), block.LocationEnd());
for (const Inst& inst : block) {
- const Opcode op{inst.Opcode()};
+ const Opcode op{inst.GetOpcode()};
ret += fmt::format("[{:016x}] ", reinterpret_cast<u64>(&inst));
if (TypeOf(op) != Type::Void) {
ret += fmt::format("%{:<5} = {}", InstIndex(inst_to_index, inst_index, &inst), op);
diff --git a/src/shader_recompiler/frontend/ir/condition.cpp b/src/shader_recompiler/frontend/ir/condition.cpp
index ec1659e2bc..fc18ea2a2f 100644
--- a/src/shader_recompiler/frontend/ir/condition.cpp
+++ b/src/shader_recompiler/frontend/ir/condition.cpp
@@ -12,10 +12,10 @@ namespace Shader::IR {
std::string NameOf(Condition condition) {
std::string ret;
- if (condition.FlowTest() != FlowTest::T) {
- ret = fmt::to_string(condition.FlowTest());
+ if (condition.GetFlowTest() != FlowTest::T) {
+ ret = fmt::to_string(condition.GetFlowTest());
}
- const auto [pred, negated]{condition.Pred()};
+ const auto [pred, negated]{condition.GetPred()};
if (!ret.empty()) {
ret += '&';
}
diff --git a/src/shader_recompiler/frontend/ir/condition.h b/src/shader_recompiler/frontend/ir/condition.h
index 51c2f15cf5..aa8597c608 100644
--- a/src/shader_recompiler/frontend/ir/condition.h
+++ b/src/shader_recompiler/frontend/ir/condition.h
@@ -30,11 +30,11 @@ public:
auto operator<=>(const Condition&) const noexcept = default;
- [[nodiscard]] IR::FlowTest FlowTest() const noexcept {
+ [[nodiscard]] IR::FlowTest GetFlowTest() const noexcept {
return static_cast<IR::FlowTest>(flow_test);
}
- [[nodiscard]] std::pair<IR::Pred, bool> Pred() const noexcept {
+ [[nodiscard]] std::pair<IR::Pred, bool> GetPred() const noexcept {
return {static_cast<IR::Pred>(pred), pred_negated != 0};
}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 13eb2de4c4..a2104bdb31 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -290,8 +290,8 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
}
U1 IREmitter::Condition(IR::Condition cond) {
- const FlowTest flow_test{cond.FlowTest()};
- const auto [pred, is_negated]{cond.Pred()};
+ const FlowTest flow_test{cond.GetFlowTest()};
+ const auto [pred, is_negated]{cond.GetPred()};
return LogicalAnd(GetPred(pred, is_negated), GetFlowTest(*this, flow_test));
}
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index 481202d94b..ceb44e6042 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -12,7 +12,7 @@
namespace Shader::IR {
namespace {
void CheckPseudoInstruction(IR::Inst* inst, IR::Opcode opcode) {
- if (inst && inst->Opcode() != opcode) {
+ if (inst && inst->GetOpcode() != opcode) {
throw LogicError("Invalid pseudo-instruction");
}
}
@@ -25,11 +25,17 @@ void SetPseudoInstruction(IR::Inst*& dest_inst, IR::Inst* pseudo_inst) {
}
void RemovePseudoInstruction(IR::Inst*& inst, IR::Opcode expected_opcode) {
- if (inst->Opcode() != expected_opcode) {
+ if (inst->GetOpcode() != expected_opcode) {
throw LogicError("Undoing use of invalid pseudo-op");
}
inst = nullptr;
}
+
+void AllocAssociatedInsts(std::unique_ptr<AssociatedInsts>& associated_insts) {
+ if (!associated_insts) {
+ associated_insts = std::make_unique<AssociatedInsts>();
+ }
+}
} // Anonymous namespace
Inst::Inst(IR::Opcode op_, u32 flags_) noexcept : op{op_}, flags{flags_} {
@@ -249,12 +255,6 @@ void Inst::ReplaceOpcode(IR::Opcode opcode) {
op = opcode;
}
-void AllocAssociatedInsts(std::unique_ptr<AssociatedInsts>& associated_insts) {
- if (!associated_insts) {
- associated_insts = std::make_unique<AssociatedInsts>();
- }
-}
-
void Inst::Use(const Value& value) {
Inst* const inst{value.Inst()};
++inst->use_count;
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.h b/src/shader_recompiler/frontend/ir/microinstruction.h
index 6658dc674e..97dc91d855 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.h
+++ b/src/shader_recompiler/frontend/ir/microinstruction.h
@@ -46,7 +46,7 @@ public:
}
/// Get the opcode this microinstruction represents.
- [[nodiscard]] IR::Opcode Opcode() const noexcept {
+ [[nodiscard]] IR::Opcode GetOpcode() const noexcept {
return op;
}
@@ -95,7 +95,7 @@ public:
requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
[[nodiscard]] FlagsType Flags() const noexcept {
FlagsType ret;
- std::memcpy(&ret, &flags, sizeof(ret));
+ std::memcpy(reinterpret_cast<char*>(&ret), &flags, sizeof(ret));
return ret;
}
diff --git a/src/shader_recompiler/frontend/ir/opcodes.cpp b/src/shader_recompiler/frontend/ir/opcodes.cpp
index 1cb9db6c9c..002dbf94e9 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.cpp
+++ b/src/shader_recompiler/frontend/ir/opcodes.cpp
@@ -49,7 +49,7 @@ constexpr std::array META_TABLE{
#define OPCODE(name_token, type_token, ...) \
OpcodeMeta{ \
.name{#name_token}, \
- .type{type_token}, \
+ .type = type_token, \
.arg_types{__VA_ARGS__}, \
},
#include "opcodes.inc"
diff --git a/src/shader_recompiler/frontend/ir/program.cpp b/src/shader_recompiler/frontend/ir/program.cpp
index 5f51aeb5f3..89a17fb1b4 100644
--- a/src/shader_recompiler/frontend/ir/program.cpp
+++ b/src/shader_recompiler/frontend/ir/program.cpp
@@ -2,8 +2,6 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
-#pragma once
-
#include <map>
#include <string>
diff --git a/src/shader_recompiler/frontend/ir/value.cpp b/src/shader_recompiler/frontend/ir/value.cpp
index 837c1b487f..1e7ffb86d5 100644
--- a/src/shader_recompiler/frontend/ir/value.cpp
+++ b/src/shader_recompiler/frontend/ir/value.cpp
@@ -33,11 +33,11 @@ Value::Value(u64 value) noexcept : type{Type::U64}, imm_u64{value} {}
Value::Value(f64 value) noexcept : type{Type::F64}, imm_f64{value} {}
bool Value::IsIdentity() const noexcept {
- return type == Type::Opaque && inst->Opcode() == Opcode::Identity;
+ return type == Type::Opaque && inst->GetOpcode() == Opcode::Identity;
}
bool Value::IsPhi() const noexcept {
- return type == Type::Opaque && inst->Opcode() == Opcode::Phi;
+ return type == Type::Opaque && inst->GetOpcode() == Opcode::Phi;
}
bool Value::IsEmpty() const noexcept {
diff --git a/src/shader_recompiler/frontend/ir/value.h b/src/shader_recompiler/frontend/ir/value.h
index b27601e704..a0962863d8 100644
--- a/src/shader_recompiler/frontend/ir/value.h
+++ b/src/shader_recompiler/frontend/ir/value.h
@@ -94,7 +94,7 @@ public:
}
}
- explicit TypedValue(IR::Inst* inst) : TypedValue(Value(inst)) {}
+ explicit TypedValue(IR::Inst* inst_) : TypedValue(Value(inst_)) {}
};
using U1 = TypedValue<Type::U1>;
diff --git a/src/shader_recompiler/frontend/maxwell/control_flow.cpp b/src/shader_recompiler/frontend/maxwell/control_flow.cpp
index 847bb19864..cb8ec7eaa3 100644
--- a/src/shader_recompiler/frontend/maxwell/control_flow.cpp
+++ b/src/shader_recompiler/frontend/maxwell/control_flow.cpp
@@ -34,41 +34,37 @@ struct Compare {
};
u32 BranchOffset(Location pc, Instruction inst) {
- return pc.Offset() + inst.branch.Offset() + 8;
+ return pc.Offset() + static_cast<u32>(inst.branch.Offset()) + 8u;
}
void Split(Block* old_block, Block* new_block, Location pc) {
if (pc <= old_block->begin || pc >= old_block->end) {
throw InvalidArgument("Invalid address to split={}", pc);
}
- *new_block = Block{
- .begin{pc},
- .end{old_block->end},
- .end_class{old_block->end_class},
- .cond{old_block->cond},
- .stack{old_block->stack},
- .branch_true{old_block->branch_true},
- .branch_false{old_block->branch_false},
- .function_call{old_block->function_call},
- .return_block{old_block->return_block},
- .branch_reg{old_block->branch_reg},
- .branch_offset{old_block->branch_offset},
- .indirect_branches{std::move(old_block->indirect_branches)},
- };
- *old_block = Block{
- .begin{old_block->begin},
- .end{pc},
- .end_class{EndClass::Branch},
- .cond{true},
- .stack{std::move(old_block->stack)},
- .branch_true{new_block},
- .branch_false{nullptr},
- .function_call{},
- .return_block{},
- .branch_reg{},
- .branch_offset{},
- .indirect_branches{},
- };
+ *new_block = Block{};
+ new_block->begin = pc;
+ new_block->end = old_block->end;
+ new_block->end_class = old_block->end_class,
+ new_block->cond = old_block->cond;
+ new_block->stack = old_block->stack;
+ new_block->branch_true = old_block->branch_true;
+ new_block->branch_false = old_block->branch_false;
+ new_block->function_call = old_block->function_call;
+ new_block->return_block = old_block->return_block;
+ new_block->branch_reg = old_block->branch_reg;
+ new_block->branch_offset = old_block->branch_offset;
+ new_block->indirect_branches = std::move(old_block->indirect_branches);
+
+ const Location old_begin{old_block->begin};
+ Stack old_stack{std::move(old_block->stack)};
+ *old_block = Block{};
+ old_block->begin = old_begin;
+ old_block->end = pc;
+ old_block->end_class = EndClass::Branch;
+ old_block->cond = IR::Condition(true);
+ old_block->stack = old_stack;
+ old_block->branch_true = new_block;
+ old_block->branch_false = nullptr;
}
Token OpcodeToken(Opcode opcode) {
@@ -141,7 +137,7 @@ std::string NameOf(const Block& block) {
void Stack::Push(Token token, Location target) {
entries.push_back({
- .token{token},
+ .token = token,
.target{target},
});
}
@@ -177,24 +173,17 @@ bool Block::Contains(Location pc) const noexcept {
}
Function::Function(ObjectPool<Block>& block_pool, Location start_address)
- : entrypoint{start_address}, labels{{
- .address{start_address},
- .block{block_pool.Create(Block{
- .begin{start_address},
- .end{start_address},
- .end_class{EndClass::Branch},
- .cond{true},
- .stack{},
- .branch_true{nullptr},
- .branch_false{nullptr},
- .function_call{},
- .return_block{},
- .branch_reg{},
- .branch_offset{},
- .indirect_branches{},
- })},
- .stack{},
- }} {}
+ : entrypoint{start_address} {
+ Label& label{labels.emplace_back()};
+ label.address = start_address;
+ label.block = block_pool.Create(Block{});
+ label.block->begin = start_address;
+ label.block->end = start_address;
+ label.block->end_class = EndClass::Branch;
+ label.block->cond = IR::Condition(true);
+ label.block->branch_true = nullptr;
+ label.block->branch_false = nullptr;
+}
CFG::CFG(Environment& env_, ObjectPool<Block>& block_pool_, Location start_address)
: env{env_}, block_pool{block_pool_}, program_start{start_address} {
@@ -327,7 +316,8 @@ CFG::AnalysisState CFG::AnalyzeInst(Block* block, FunctionId function_id, Locati
// Insert the function into the list if it doesn't exist
const auto it{std::ranges::find(functions, cal_pc, &Function::entrypoint)};
const bool exists{it != functions.end()};
- const FunctionId call_id{exists ? std::distance(functions.begin(), it) : functions.size()};
+ const FunctionId call_id{exists ? static_cast<size_t>(std::distance(functions.begin(), it))
+ : functions.size()};
if (!exists) {
functions.emplace_back(block_pool, cal_pc);
}
@@ -362,20 +352,14 @@ void CFG::AnalyzeCondInst(Block* block, FunctionId function_id, Location pc,
}
// Create a virtual block and a conditional block
Block* const conditional_block{block_pool.Create()};
- Block virtual_block{
- .begin{block->begin.Virtual()},
- .end{block->begin.Virtual()},
- .end_class{EndClass::Branch},
- .cond{cond},
- .stack{block->stack},
- .branch_true{conditional_block},
- .branch_false{nullptr},
- .function_call{},
- .return_block{},
- .branch_reg{},
- .branch_offset{},
- .indirect_branches{},
- };
+ Block virtual_block{};
+ virtual_block.begin = block->begin.Virtual();
+ virtual_block.end = block->begin.Virtual();
+ virtual_block.end_class = EndClass::Branch;
+ virtual_block.stack = block->stack;
+ virtual_block.cond = cond;
+ virtual_block.branch_true = conditional_block;
+ virtual_block.branch_false = nullptr;
// Save the contents of the visited block in the conditional block
*conditional_block = std::move(*block);
// Impersonate the visited block with a virtual block
@@ -444,7 +428,7 @@ CFG::AnalysisState CFG::AnalyzeBRX(Block* block, Location pc, Instruction inst,
if (!is_absolute) {
target += pc.Offset();
}
- target += brx_table->branch_offset;
+ target += static_cast<unsigned int>(brx_table->branch_offset);
target += 8;
targets.push_back(target);
}
@@ -455,8 +439,8 @@ CFG::AnalysisState CFG::AnalyzeBRX(Block* block, Location pc, Instruction inst,
for (const u32 target : targets) {
Block* const branch{AddLabel(block, block->stack, target, function_id)};
block->indirect_branches.push_back({
- .block{branch},
- .address{target},
+ .block = branch,
+ .address = target,
});
}
block->cond = IR::Condition{true};
@@ -523,23 +507,17 @@ Block* CFG::AddLabel(Block* block, Stack stack, Location pc, FunctionId function
if (label_it != function.labels.end()) {
return label_it->block;
}
- Block* const new_block{block_pool.Create(Block{
- .begin{pc},
- .end{pc},
- .end_class{EndClass::Branch},
- .cond{true},
- .stack{stack},
- .branch_true{nullptr},
- .branch_false{nullptr},
- .function_call{},
- .return_block{},
- .branch_reg{},
- .branch_offset{},
- .indirect_branches{},
- })};
+ Block* const new_block{block_pool.Create()};
+ new_block->begin = pc;
+ new_block->end = pc;
+ new_block->end_class = EndClass::Branch;
+ new_block->cond = IR::Condition(true);
+ new_block->stack = stack;
+ new_block->branch_true = nullptr;
+ new_block->branch_false = nullptr;
function.labels.push_back(Label{
.address{pc},
- .block{new_block},
+ .block = new_block,
.stack{std::move(stack)},
});
return new_block;
diff --git a/src/shader_recompiler/frontend/maxwell/decode.cpp b/src/shader_recompiler/frontend/maxwell/decode.cpp
index bd85afa1e5..932d19c1d4 100644
--- a/src/shader_recompiler/frontend/maxwell/decode.cpp
+++ b/src/shader_recompiler/frontend/maxwell/decode.cpp
@@ -45,7 +45,7 @@ constexpr MaskValue MaskValueFromEncoding(const char* encoding) {
bit >>= 1;
}
}
- return MaskValue{.mask{mask}, .value{value}};
+ return MaskValue{.mask = mask, .value = value};
}
struct InstEncoding {
@@ -56,7 +56,7 @@ constexpr std::array UNORDERED_ENCODINGS{
#define INST(name, cute, encode) \
InstEncoding{ \
.mask_value{MaskValueFromEncoding(encode)}, \
- .opcode{Opcode::name}, \
+ .opcode = Opcode::name, \
},
#include "maxwell.inc"
#undef INST
@@ -116,9 +116,9 @@ constexpr auto MakeFastLookupTableIndex(size_t index) {
const size_t value{ToFastLookupIndex(encoding.mask_value.value)};
if ((index & mask) == value) {
encodings.at(element) = InstInfo{
- .high_mask{static_cast<u16>(encoding.mask_value.mask >> MASK_SHIFT)},
- .high_value{static_cast<u16>(encoding.mask_value.value >> MASK_SHIFT)},
- .opcode{encoding.opcode},
+ .high_mask = static_cast<u16>(encoding.mask_value.mask >> MASK_SHIFT),
+ .high_value = static_cast<u16>(encoding.mask_value.value >> MASK_SHIFT),
+ .opcode = encoding.opcode,
};
++element;
}
diff --git a/src/shader_recompiler/frontend/maxwell/indirect_branch_table_track.cpp b/src/shader_recompiler/frontend/maxwell/indirect_branch_table_track.cpp
index 96453509d5..008625cb37 100644
--- a/src/shader_recompiler/frontend/maxwell/indirect_branch_table_track.cpp
+++ b/src/shader_recompiler/frontend/maxwell/indirect_branch_table_track.cpp
@@ -97,11 +97,11 @@ std::optional<IndirectBranchTableInfo> TrackIndirectBranchTable(Environment& env
}
const u32 imnmx_immediate{static_cast<u32>(imnmx.immediate.Value())};
return IndirectBranchTableInfo{
- .cbuf_index{cbuf_index},
- .cbuf_offset{cbuf_offset},
- .num_entries{imnmx_immediate + 1},
- .branch_offset{brx_offset},
- .branch_reg{brx_reg},
+ .cbuf_index = cbuf_index,
+ .cbuf_offset = cbuf_offset,
+ .num_entries = imnmx_immediate + 1,
+ .branch_offset = brx_offset,
+ .branch_reg = brx_reg,
};
}
diff --git a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
index c804c2a8e9..02cef26455 100644
--- a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
+++ b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
@@ -558,7 +558,6 @@ private:
const Node label{goto_stmt->label};
const u32 label_id{label->id};
const Node label_nested_stmt{FindStatementWithLabel(body, goto_stmt)};
- const auto type{label_nested_stmt->type};
Tree loop_body;
loop_body.splice(loop_body.begin(), body, label_nested_stmt, goto_stmt);
@@ -566,7 +565,7 @@ private:
Statement* const variable{pool.Create(Variable{}, label_id)};
Statement* const loop_stmt{pool.Create(Loop{}, variable, std::move(loop_body), parent)};
UpdateTreeUp(loop_stmt);
- const Node loop_node{body.insert(goto_stmt, *loop_stmt)};
+ body.insert(goto_stmt, *loop_stmt);
Statement* const new_goto{pool.Create(Goto{}, variable, label, loop_stmt)};
loop_stmt->children.push_front(*new_goto);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp
index ac1433dea7..5a1b3a8fcb 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp
@@ -31,9 +31,9 @@ void DADD(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
const IR::F64 op_b{v.ir.FPAbsNeg(src_b, dadd.abs_b != 0, dadd.neg_b != 0)};
const IR::FpControl control{
- .no_contraction{true},
- .rounding{CastFpRounding(dadd.fp_rounding)},
- .fmz_mode{IR::FmzMode::None},
+ .no_contraction = true,
+ .rounding = CastFpRounding(dadd.fp_rounding),
+ .fmz_mode = IR::FmzMode::None,
};
v.D(dadd.dest_reg, v.ir.FPAdd(op_a, op_b, control));
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp
index ff73218629..7238414962 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp
@@ -25,9 +25,9 @@ void DFMA(TranslatorVisitor& v, u64 insn, const IR::F64& src_b, const IR::F64& s
const IR::F64 op_c{v.ir.FPAbsNeg(src_c, false, dfma.neg_c != 0)};
const IR::FpControl control{
- .no_contraction{true},
- .rounding{CastFpRounding(dfma.fp_rounding)},
- .fmz_mode{IR::FmzMode::None},
+ .no_contraction = true,
+ .rounding = CastFpRounding(dfma.fp_rounding),
+ .fmz_mode = IR::FmzMode::None,
};
v.D(dfma.dest_reg, v.ir.FPFma(src_a, op_b, op_c, control));
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
index 3e83d1c95c..4a49299a0b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
@@ -21,9 +21,9 @@ void DMUL(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
const IR::F64 src_a{v.ir.FPAbsNeg(v.D(dmul.src_a_reg), false, dmul.neg != 0)};
const IR::FpControl control{
- .no_contraction{true},
- .rounding{CastFpRounding(dmul.fp_rounding)},
- .fmz_mode{IR::FmzMode::None},
+ .no_contraction = true,
+ .rounding = CastFpRounding(dmul.fp_rounding),
+ .fmz_mode = IR::FmzMode::None,
};
v.D(dmul.dest_reg, v.ir.FPMul(src_a, src_b, control));
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_add.cpp
index b39950c849..b8c89810cb 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_add.cpp
@@ -23,9 +23,9 @@ void FADD(TranslatorVisitor& v, u64 insn, bool sat, bool cc, bool ftz, FpRoundin
const IR::F32 op_a{v.ir.FPAbsNeg(v.F(fadd.src_a), abs_a, neg_a)};
const IR::F32 op_b{v.ir.FPAbsNeg(src_b, abs_b, neg_b)};
IR::FpControl control{
- .no_contraction{true},
- .rounding{CastFpRounding(fp_rounding)},
- .fmz_mode{ftz ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = true,
+ .rounding = CastFpRounding(fp_rounding),
+ .fmz_mode = (ftz ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
IR::F32 value{v.ir.FPAdd(op_a, op_b, control)};
if (sat) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare.cpp
index c02a40209e..80109ca0e5 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare.cpp
@@ -19,8 +19,7 @@ void FCMP(TranslatorVisitor& v, u64 insn, const IR::U32& src_a, const IR::F32& o
} const fcmp{insn};
const IR::F32 zero{v.ir.Imm32(0.0f)};
- const IR::F32 neg_zero{v.ir.Imm32(-0.0f)};
- const IR::FpControl control{.fmz_mode{fcmp.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None}};
+ const IR::FpControl control{.fmz_mode = (fcmp.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None)};
const IR::U1 cmp_result{FloatingPointCompare(v.ir, operand, zero, fcmp.compare_op, control)};
const IR::U32 src_reg{v.X(fcmp.src_reg)};
const IR::U32 result{v.ir.Select(cmp_result, src_reg, src_a)};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare_and_set.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare_and_set.cpp
index c5417775e1..b9f4ee0d9b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare_and_set.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_compare_and_set.cpp
@@ -29,9 +29,9 @@ void FSET(TranslatorVisitor& v, u64 insn, const IR::F32& src_b) {
const IR::F32 op_a{v.ir.FPAbsNeg(v.F(fset.src_a_reg), fset.abs_a != 0, fset.negate_a != 0)};
const IR::F32 op_b = v.ir.FPAbsNeg(src_b, fset.abs_b != 0, fset.negate_b != 0);
const IR::FpControl control{
- .no_contraction{false},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{fset.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (fset.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
IR::U1 pred{v.ir.GetPred(fset.pred)};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
index 1e366fde03..035f8782a7 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
@@ -57,9 +57,9 @@ void F2F(TranslatorVisitor& v, u64 insn, const IR::F16F32F64& src_a, bool abs) {
const bool any_fp64{f2f.src_size == FloatFormat::F64 || f2f.dst_size == FloatFormat::F64};
IR::FpControl fp_control{
- .no_contraction{false},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{f2f.ftz != 0 && !any_fp64 ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (f2f.ftz != 0 && !any_fp64 ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
if (f2f.src_size != f2f.dst_size) {
fp_control.rounding = CastFpRounding(f2f.rounding);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
index 21ae92be1e..cf3cf1ba69 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
@@ -123,9 +123,9 @@ void TranslateF2I(TranslatorVisitor& v, u64 insn, const IR::F16F32F64& src_a) {
fmz_mode = f2i.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None;
}
const IR::FpControl fp_control{
- .no_contraction{true},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{fmz_mode},
+ .no_contraction = true,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = fmz_mode,
};
const IR::F16F32F64 op_a{v.ir.FPAbsNeg(src_a, f2i.abs != 0, f2i.neg != 0)};
const IR::F16F32F64 rounded_value{[&] {
@@ -186,14 +186,14 @@ void TranslateF2I(TranslatorVisitor& v, u64 insn, const IR::F16F32F64& src_a) {
} else if (f2i.dest_format == DestFormat::I64) {
handled_special_case = true;
result = IR::U64{
- v.ir.Select(v.ir.FPIsNan(op_a), v.ir.Imm64(0x8000'0000'0000'0000ULL), result)};
+ v.ir.Select(v.ir.FPIsNan(op_a), v.ir.Imm64(0x8000'0000'0000'0000UL), result)};
}
}
if (!handled_special_case && is_signed) {
if (bitsize != 64) {
result = IR::U32{v.ir.Select(v.ir.FPIsNan(op_a), v.ir.Imm32(0U), result)};
} else {
- result = IR::U64{v.ir.Select(v.ir.FPIsNan(op_a), v.ir.Imm64(0ULL), result)};
+ result = IR::U64{v.ir.Select(v.ir.FPIsNan(op_a), v.ir.Imm64(0UL), result)};
}
}
@@ -211,6 +211,7 @@ void TranslateF2I(TranslatorVisitor& v, u64 insn, const IR::F16F32F64& src_a) {
void TranslatorVisitor::F2I_reg(u64 insn) {
union {
+ u64 raw;
F2I base;
BitField<20, 8, IR::Reg> src_reg;
} const f2i{insn};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_fused_multiply_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_fused_multiply_add.cpp
index 18561bc9c7..fa2a7807b7 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_fused_multiply_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_fused_multiply_add.cpp
@@ -24,9 +24,9 @@ void FFMA(TranslatorVisitor& v, u64 insn, const IR::F32& src_b, const IR::F32& s
const IR::F32 op_b{v.ir.FPAbsNeg(src_b, false, neg_b)};
const IR::F32 op_c{v.ir.FPAbsNeg(src_c, false, neg_c)};
const IR::FpControl fp_control{
- .no_contraction{true},
- .rounding{CastFpRounding(fp_rounding)},
- .fmz_mode{CastFmzMode(fmz_mode)},
+ .no_contraction = true,
+ .rounding = CastFpRounding(fp_rounding),
+ .fmz_mode = CastFmzMode(fmz_mode),
};
IR::F32 value{v.ir.FPFma(op_a, op_b, op_c, fp_control)};
if (fmz_mode == FmzMode::FMZ && !sat) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_min_max.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_min_max.cpp
index 343d91032b..8ae4375287 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_min_max.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_min_max.cpp
@@ -27,9 +27,9 @@ void FMNMX(TranslatorVisitor& v, u64 insn, const IR::F32& src_b) {
const IR::F32 op_b{v.ir.FPAbsNeg(src_b, fmnmx.abs_b != 0, fmnmx.negate_b != 0)};
const IR::FpControl control{
- .no_contraction{false},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{fmnmx.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (fmnmx.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
IR::F32 max{v.ir.FPMax(op_a, op_b, control)};
IR::F32 min{v.ir.FPMin(op_a, op_b, control)};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_multiply.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_multiply.cpp
index 72f0a18ae8..06226b7ce2 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_multiply.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_multiply.cpp
@@ -64,9 +64,9 @@ void FMUL(TranslatorVisitor& v, u64 insn, const IR::F32& src_b, FmzMode fmz_mode
}
const IR::F32 op_b{v.ir.FPAbsNeg(src_b, false, neg_b)};
const IR::FpControl fp_control{
- .no_contraction{true},
- .rounding{CastFpRounding(fp_rounding)},
- .fmz_mode{CastFmzMode(fmz_mode)},
+ .no_contraction = true,
+ .rounding = CastFpRounding(fp_rounding),
+ .fmz_mode = CastFmzMode(fmz_mode),
};
IR::F32 value{v.ir.FPMul(op_a, op_b, fp_control)};
if (fmz_mode == FmzMode::FMZ && !sat) {
@@ -124,4 +124,4 @@ void TranslatorVisitor::FMUL32I(u64 insn) {
fmul32i.sat != 0, fmul32i.cc != 0, false);
}
-} // namespace Shader::Maxwell
\ No newline at end of file
+} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_set_predicate.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_set_predicate.cpp
index 8ff9db8438..5f93a15130 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_set_predicate.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_set_predicate.cpp
@@ -29,9 +29,9 @@ void FSETP(TranslatorVisitor& v, u64 insn, const IR::F32& src_b) {
const IR::F32 op_a{v.ir.FPAbsNeg(v.F(fsetp.src_a_reg), fsetp.abs_a != 0, fsetp.negate_a != 0)};
const IR::F32 op_b = v.ir.FPAbsNeg(src_b, fsetp.abs_b != 0, fsetp.negate_b != 0);
const IR::FpControl control{
- .no_contraction{false},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{fsetp.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (fsetp.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
const BooleanOp bop{fsetp.bop};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_swizzled_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_swizzled_add.cpp
index e42921a216..7550a8d4c4 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_swizzled_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_swizzled_add.cpp
@@ -28,9 +28,9 @@ void TranslatorVisitor::FSWZADD(u64 insn) {
const IR::U32 swizzle{ir.Imm32(static_cast<u32>(fswzadd.swizzle))};
const IR::FpControl fp_control{
- .no_contraction{false},
- .rounding{CastFpRounding(fswzadd.round)},
- .fmz_mode{fswzadd.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = CastFpRounding(fswzadd.round),
+ .fmz_mode = (fswzadd.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
const IR::F32 result{ir.FSwizzleAdd(src_a, src_b, swizzle, fp_control)};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp
index 03e7bf047d..f2738a93b2 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp
@@ -34,9 +34,9 @@ void HADD2(TranslatorVisitor& v, u64 insn, Merge merge, bool ftz, bool sat, bool
rhs_b = v.ir.FPAbsNeg(rhs_b, abs_b, neg_b);
const IR::FpControl fp_control{
- .no_contraction{true},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{ftz ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = true,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (ftz ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
IR::F16F32F64 lhs{v.ir.FPAdd(lhs_a, lhs_b, fp_control)};
IR::F16F32F64 rhs{v.ir.FPAdd(rhs_a, rhs_b, fp_control)};
@@ -102,8 +102,9 @@ void TranslatorVisitor::HADD2_imm(u64 insn) {
BitField<20, 9, u64> low;
} const hadd2{insn};
- const u32 imm{static_cast<u32>(hadd2.low << 6) | ((hadd2.neg_low != 0 ? 1 : 0) << 15) |
- static_cast<u32>(hadd2.high << 22) | ((hadd2.neg_high != 0 ? 1 : 0) << 31)};
+ const u32 imm{
+ static_cast<u32>(hadd2.low << 6) | static_cast<u32>((hadd2.neg_low != 0 ? 1 : 0) << 15) |
+ static_cast<u32>(hadd2.high << 22) | static_cast<u32>((hadd2.neg_high != 0 ? 1 : 0) << 31)};
HADD2(*this, insn, hadd2.sat != 0, false, false, Swizzle::H1_H0, ir.Imm32(imm));
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_fused_multiply_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_fused_multiply_add.cpp
index 8b234bd6ae..fd79867016 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_fused_multiply_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_fused_multiply_add.cpp
@@ -41,9 +41,9 @@ void HFMA2(TranslatorVisitor& v, u64 insn, Merge merge, Swizzle swizzle_a, bool
rhs_c = v.ir.FPAbsNeg(rhs_c, false, neg_c);
const IR::FpControl fp_control{
- .no_contraction{true},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{HalfPrecision2FmzMode(precision)},
+ .no_contraction = true,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = HalfPrecision2FmzMode(precision),
};
IR::F16F32F64 lhs{v.ir.FPFma(lhs_a, lhs_b, lhs_c, fp_control)};
IR::F16F32F64 rhs{v.ir.FPFma(rhs_a, rhs_b, rhs_c, fp_control)};
@@ -143,8 +143,9 @@ void TranslatorVisitor::HFMA2_imm(u64 insn) {
BitField<57, 2, HalfPrecision> precision;
} const hfma2{insn};
- const u32 imm{static_cast<u32>(hfma2.low << 6) | ((hfma2.neg_low != 0 ? 1 : 0) << 15) |
- static_cast<u32>(hfma2.high << 22) | ((hfma2.neg_high != 0 ? 1 : 0) << 31)};
+ const u32 imm{
+ static_cast<u32>(hfma2.low << 6) | static_cast<u32>((hfma2.neg_low != 0 ? 1 : 0) << 15) |
+ static_cast<u32>(hfma2.high << 22) | static_cast<u32>((hfma2.neg_high != 0 ? 1 : 0) << 31)};
HFMA2(*this, insn, false, hfma2.neg_c != 0, Swizzle::H1_H0, hfma2.swizzle_c, ir.Imm32(imm),
GetReg39(insn), hfma2.saturate != 0, hfma2.precision);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_multiply.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_multiply.cpp
index 2451a6ef68..3f548ce761 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_multiply.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_multiply.cpp
@@ -35,9 +35,9 @@ void HMUL2(TranslatorVisitor& v, u64 insn, Merge merge, bool sat, bool abs_a, bo
rhs_b = v.ir.FPAbsNeg(rhs_b, abs_b, neg_b);
const IR::FpControl fp_control{
- .no_contraction{true},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{HalfPrecision2FmzMode(precision)},
+ .no_contraction = true,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = HalfPrecision2FmzMode(precision),
};
IR::F16F32F64 lhs{v.ir.FPMul(lhs_a, lhs_b, fp_control)};
IR::F16F32F64 rhs{v.ir.FPMul(rhs_a, rhs_b, fp_control)};
@@ -119,8 +119,9 @@ void TranslatorVisitor::HMUL2_imm(u64 insn) {
BitField<44, 1, u64> abs_a;
} const hmul2{insn};
- const u32 imm{static_cast<u32>(hmul2.low << 6) | ((hmul2.neg_low != 0 ? 1 : 0) << 15) |
- static_cast<u32>(hmul2.high << 22) | ((hmul2.neg_high != 0 ? 1 : 0) << 31)};
+ const u32 imm{
+ static_cast<u32>(hmul2.low << 6) | static_cast<u32>((hmul2.neg_low != 0 ? 1 : 0) << 15) |
+ static_cast<u32>(hmul2.high << 22) | static_cast<u32>((hmul2.neg_high != 0 ? 1 : 0) << 31)};
HMUL2(*this, insn, hmul2.sat != 0, hmul2.abs_a != 0, hmul2.neg_a != 0, false, false,
Swizzle::H1_H0, ir.Imm32(imm));
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set.cpp
index 7f1f4b88c8..cca5b831fd 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set.cpp
@@ -41,9 +41,9 @@ void HSET2(TranslatorVisitor& v, u64 insn, const IR::U32& src_b, bool bf, bool f
rhs_b = v.ir.FPAbsNeg(rhs_b, abs_b, neg_b);
const IR::FpControl control{
- .no_contraction{false},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{ftz ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (ftz ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
IR::U1 pred{v.ir.GetPred(hset2.pred)};
@@ -106,8 +106,9 @@ void TranslatorVisitor::HSET2_imm(u64 insn) {
BitField<20, 9, u64> low;
} const hset2{insn};
- const u32 imm{static_cast<u32>(hset2.low << 6) | ((hset2.neg_low != 0 ? 1 : 0) << 15) |
- static_cast<u32>(hset2.high << 22) | ((hset2.neg_high != 0 ? 1 : 0) << 31)};
+ const u32 imm{
+ static_cast<u32>(hset2.low << 6) | static_cast<u32>((hset2.neg_low != 0 ? 1 : 0) << 15) |
+ static_cast<u32>(hset2.high << 22) | static_cast<u32>((hset2.neg_high != 0 ? 1 : 0) << 31)};
HSET2(*this, insn, ir.Imm32(imm), hset2.bf != 0, hset2.ftz != 0, false, false, hset2.compare_op,
Swizzle::H1_H0);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set_predicate.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set_predicate.cpp
index 3e2a23c92d..b3931dae32 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set_predicate.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_set_predicate.cpp
@@ -43,9 +43,9 @@ void HSETP2(TranslatorVisitor& v, u64 insn, const IR::U32& src_b, bool neg_b, bo
rhs_b = v.ir.FPAbsNeg(rhs_b, abs_b, neg_b);
const IR::FpControl control{
- .no_contraction{false},
- .rounding{IR::FpRounding::DontCare},
- .fmz_mode{hsetp2.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None},
+ .no_contraction = false,
+ .rounding = IR::FpRounding::DontCare,
+ .fmz_mode = (hsetp2.ftz != 0 ? IR::FmzMode::FTZ : IR::FmzMode::None),
};
IR::U1 pred{v.ir.GetPred(hsetp2.pred)};
@@ -106,8 +106,10 @@ void TranslatorVisitor::HSETP2_imm(u64 insn) {
BitField<20, 9, u64> low;
} const hsetp2{insn};
- const u32 imm{static_cast<u32>(hsetp2.low << 6) | ((hsetp2.neg_low != 0 ? 1 : 0) << 15) |
- static_cast<u32>(hsetp2.high << 22) | ((hsetp2.neg_high != 0 ? 1 : 0) << 31)};
+ const u32 imm{static_cast<u32>(hsetp2.low << 6) |
+ static_cast<u32>((hsetp2.neg_low != 0 ? 1 : 0) << 15) |
+ static_cast<u32>(hsetp2.high << 22) |
+ static_cast<u32>((hsetp2.neg_high != 0 ? 1 : 0) << 31)};
HSETP2(*this, insn, ir.Imm32(imm), false, false, Swizzle::H1_H0, hsetp2.compare_op,
hsetp2.h_and != 0);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
index 30b570ce4d..88bbac0a50 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
@@ -49,7 +49,7 @@ void TranslatorVisitor::L(IR::Reg dest_reg, const IR::U64& value) {
}
const IR::Value result{ir.UnpackUint2x32(value)};
for (int i = 0; i < 2; i++) {
- X(dest_reg + i, IR::U32{ir.CompositeExtract(result, i)});
+ X(dest_reg + i, IR::U32{ir.CompositeExtract(result, static_cast<size_t>(i))});
}
}
@@ -63,7 +63,7 @@ void TranslatorVisitor::D(IR::Reg dest_reg, const IR::F64& value) {
}
const IR::Value result{ir.UnpackDouble2x32(value)};
for (int i = 0; i < 2; i++) {
- X(dest_reg + i, IR::U32{ir.CompositeExtract(result, i)});
+ X(dest_reg + i, IR::U32{ir.CompositeExtract(result, static_cast<size_t>(i))});
}
}
@@ -156,7 +156,7 @@ IR::F64 TranslatorVisitor::GetDoubleCbuf(u64 insn) {
const auto [binding, offset_value]{CbufAddr(insn)};
const bool unaligned{cbuf.unaligned != 0};
const u32 offset{offset_value.U32()};
- const IR::Value addr{unaligned ? offset | 4 : (offset & ~7) | 4};
+ const IR::Value addr{unaligned ? offset | 4u : (offset & ~7u) | 4u};
const IR::U32 value{ir.GetCbuf(binding, IR::U32{addr})};
const IR::U32 lower_bits{CbufLowerBits(ir, unaligned, binding, offset)};
@@ -200,7 +200,7 @@ IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
BitField<20, 19, u64> value;
BitField<56, 1, u64> is_negative;
} const imm{insn};
- const u32 sign_bit{imm.is_negative != 0 ? (1ULL << 31) : 0};
+ const u32 sign_bit{static_cast<u32>(imm.is_negative != 0 ? (1ULL << 31) : 0)};
const u32 value{static_cast<u32>(imm.value) << 12};
return ir.Imm32(Common::BitCast<f32>(value | sign_bit));
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add.cpp
index 1493e18151..8ffd84867d 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add.cpp
@@ -68,7 +68,6 @@ void IADD(TranslatorVisitor& v, u64 insn, IR::U32 op_b) {
} const iadd{insn};
const bool po{iadd.three_for_po == 3};
- const bool neg_a{!po && iadd.neg_a != 0};
if (!po && iadd.neg_b != 0) {
op_b = v.ir.INeg(op_b);
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_floating_point_conversion.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_floating_point_conversion.cpp
index e8b5ae1d2d..5a0fc36a03 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_floating_point_conversion.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_floating_point_conversion.cpp
@@ -131,7 +131,7 @@ void I2F(TranslatorVisitor& v, u64 insn, IR::U32U64 src) {
}
const IR::Value vector{v.ir.UnpackDouble2x32(value)};
for (int i = 0; i < 2; ++i) {
- v.X(i2f.dest_reg + i, IR::U32{v.ir.CompositeExtract(vector, i)});
+ v.X(i2f.dest_reg + i, IR::U32{v.ir.CompositeExtract(vector, static_cast<size_t>(i))});
}
break;
}
@@ -170,4 +170,4 @@ void TranslatorVisitor::I2F_imm(u64 insn) {
}
}
-} // namespace Shader::Maxwell
\ No newline at end of file
+} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
index ae3ecea325..2300088e38 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
@@ -50,7 +50,7 @@ void TranslatorVisitor::LDC(u64 insn) {
}
const IR::Value vector{ir.GetCbuf(index, offset, 64, false)};
for (int i = 0; i < 2; ++i) {
- X(ldc.dest_reg + i, IR::U32{ir.CompositeExtract(vector, i)});
+ X(ldc.dest_reg + i, IR::U32{ir.CompositeExtract(vector, static_cast<size_t>(i))});
}
break;
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_local_shared.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_local_shared.cpp
index 68963c8ea6..e24b497210 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_local_shared.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_local_shared.cpp
@@ -40,7 +40,6 @@ std::pair<int, bool> GetSize(u64 insn) {
BitField<48, 3, Size> size;
} const encoding{insn};
- const Size nnn = encoding.size;
switch (encoding.size) {
case Size::U8:
return {8, false};
@@ -99,7 +98,7 @@ void TranslatorVisitor::LDL(u64 insn) {
case 32:
case 64:
case 128:
- if (!IR::IsAligned(dest, bit_size / 32)) {
+ if (!IR::IsAligned(dest, static_cast<size_t>(bit_size / 32))) {
throw NotImplementedException("Unaligned destination register {}", dest);
}
X(dest, ir.LoadLocal(word_offset));
@@ -123,11 +122,11 @@ void TranslatorVisitor::LDS(u64 insn) {
break;
case 64:
case 128:
- if (!IR::IsAligned(dest, bit_size / 32)) {
+ if (!IR::IsAligned(dest, static_cast<size_t>(bit_size / 32))) {
throw NotImplementedException("Unaligned destination register {}", dest);
}
for (int element = 0; element < bit_size / 32; ++element) {
- X(dest + element, IR::U32{ir.CompositeExtract(value, element)});
+ X(dest + element, IR::U32{ir.CompositeExtract(value, static_cast<size_t>(element))});
}
break;
}
@@ -156,7 +155,7 @@ void TranslatorVisitor::STL(u64 insn) {
case 32:
case 64:
case 128:
- if (!IR::IsAligned(reg, bit_size / 32)) {
+ if (!IR::IsAligned(reg, static_cast<size_t>(bit_size / 32))) {
throw NotImplementedException("Unaligned source register");
}
ir.WriteLocal(word_offset, src);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp
index 71688b1d78..36c5cff2f1 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp
@@ -114,7 +114,7 @@ void TranslatorVisitor::LDG(u64 insn) {
}
const IR::Value vector{ir.LoadGlobal64(address)};
for (int i = 0; i < 2; ++i) {
- X(dest_reg + i, IR::U32{ir.CompositeExtract(vector, i)});
+ X(dest_reg + i, IR::U32{ir.CompositeExtract(vector, static_cast<size_t>(i))});
}
break;
}
@@ -125,7 +125,7 @@ void TranslatorVisitor::LDG(u64 insn) {
}
const IR::Value vector{ir.LoadGlobal128(address)};
for (int i = 0; i < 4; ++i) {
- X(dest_reg + i, IR::U32{ir.CompositeExtract(vector, i)});
+ X(dest_reg + i, IR::U32{ir.CompositeExtract(vector, static_cast<size_t>(i))});
}
break;
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp
index b2da079f9c..95d4165863 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp
@@ -199,7 +199,7 @@ void Impl(TranslatorVisitor& v, u64 insn, bool aoffi, Blod blod, bool lc,
if (tex.dc != 0) {
value = element < 3 ? IR::F32{sample} : v.ir.Imm32(1.0f);
} else {
- value = IR::F32{v.ir.CompositeExtract(sample, element)};
+ value = IR::F32{v.ir.CompositeExtract(sample, static_cast<size_t>(element))};
}
v.F(dest_reg, value);
++dest_reg;
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
index d5fda20f42..fe2c7db85d 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
@@ -53,7 +53,7 @@ constexpr std::array RGBA_LUT{
R | G | B | A, //
};
-void CheckAlignment(IR::Reg reg, int alignment) {
+void CheckAlignment(IR::Reg reg, size_t alignment) {
if (!IR::IsAligned(reg, alignment)) {
throw NotImplementedException("Unaligned source register {}", reg);
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather_swizzled.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather_swizzled.cpp
index beab515ad9..2ba9c1018a 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather_swizzled.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather_swizzled.cpp
@@ -37,7 +37,7 @@ union Encoding {
BitField<36, 13, u64> cbuf_offset;
};
-void CheckAlignment(IR::Reg reg, int alignment) {
+void CheckAlignment(IR::Reg reg, size_t alignment) {
if (!IR::IsAligned(reg, alignment)) {
throw NotImplementedException("Unaligned source register {}", reg);
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load_swizzled.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load_swizzled.cpp
index 623b8fc23b..0863bdfcd4 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load_swizzled.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load_swizzled.cpp
@@ -56,7 +56,7 @@ union Encoding {
BitField<53, 4, u64> encoding;
};
-void CheckAlignment(IR::Reg reg, int alignment) {
+void CheckAlignment(IR::Reg reg, size_t alignment) {
if (!IR::IsAligned(reg, alignment)) {
throw NotImplementedException("Unaligned source register {}", reg);
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_query.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_query.cpp
index 8c7e04bcab..0459e5473e 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_query.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_query.cpp
@@ -54,7 +54,7 @@ void Impl(TranslatorVisitor& v, u64 insn, std::optional<u32> cbuf_offset) {
if (((txq.mask >> element) & 1) == 0) {
continue;
}
- v.X(dest_reg, IR::U32{v.ir.CompositeExtract(query, element)});
+ v.X(dest_reg, IR::U32{v.ir.CompositeExtract(query, static_cast<size_t>(element))});
++dest_reg;
}
}
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/video_set_predicate.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/video_set_predicate.cpp
index af13b3fccf..ec5e74f6d8 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/video_set_predicate.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/video_set_predicate.cpp
@@ -69,7 +69,6 @@ void TranslatorVisitor::VSETP(u64 insn) {
const IR::U32 src_b{is_b_imm ? ir.Imm32(static_cast<u32>(vsetp.src_b_imm)) : GetReg20(insn)};
const u32 a_selector{static_cast<u32>(vsetp.src_a_selector)};
- const u32 b_selector{is_b_imm ? 0U : static_cast<u32>(vsetp.src_b_selector)};
const VideoWidth a_width{vsetp.src_a_width};
const VideoWidth b_width{GetVideoSourceWidth(vsetp.src_b_width, is_b_imm)};
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index 1c03ee82af..edbfcd3082 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -6,6 +6,7 @@
#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/modifiers.h"
#include "shader_recompiler/frontend/ir/program.h"
+#include "shader_recompiler/ir_opt/passes.h"
#include "shader_recompiler/shader_info.h"
namespace Shader::Optimization {
@@ -22,8 +23,8 @@ void AddConstantBufferDescriptor(Info& info, u32 index, u32 count) {
auto& cbufs{info.constant_buffer_descriptors};
cbufs.insert(std::ranges::lower_bound(cbufs, index, {}, &ConstantBufferDescriptor::index),
ConstantBufferDescriptor{
- .index{index},
- .count{1},
+ .index = index,
+ .count = 1,
});
}
@@ -91,7 +92,7 @@ void SetAttribute(Info& info, IR::Attribute attribute) {
}
void VisitUsages(Info& info, IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::CompositeConstructF16x2:
case IR::Opcode::CompositeConstructF16x3:
case IR::Opcode::CompositeConstructF16x4:
@@ -209,7 +210,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
default:
break;
}
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::GetCbufU8:
case IR::Opcode::GetCbufS8:
case IR::Opcode::UndefU8:
@@ -236,7 +237,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
default:
break;
}
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::GetCbufU16:
case IR::Opcode::GetCbufS16:
case IR::Opcode::UndefU16:
@@ -271,7 +272,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
default:
break;
}
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::UndefU64:
case IR::Opcode::LoadGlobalU8:
case IR::Opcode::LoadGlobalS8:
@@ -314,7 +315,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
default:
break;
}
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::DemoteToHelperInvocation:
info.uses_demote_to_helper_invocation = true;
break;
@@ -361,7 +362,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
} else {
throw NotImplementedException("Constant buffer with non-immediate index");
}
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::GetCbufU8:
case IR::Opcode::GetCbufS8:
info.used_constant_buffer_types |= IR::Type::U8;
@@ -443,7 +444,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
}
void VisitFpModifiers(Info& info, IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::FPAdd16:
case IR::Opcode::FPFma16:
case IR::Opcode::FPMul16:
@@ -540,7 +541,6 @@ void GatherInfoFromHeader(Environment& env, Info& info) {
info.stores_position |= header.vtg.omap_systemb.position != 0;
}
}
-
} // Anonymous namespace
void CollectShaderInfoPass(Environment& env, IR::Program& program) {
diff --git a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
index 1720d7a092..61fbbe04cb 100644
--- a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
+++ b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
@@ -58,7 +58,7 @@ bool FoldCommutative(IR::Inst& inst, ImmFn&& imm_fn) {
}
if (is_lhs_immediate && !is_rhs_immediate) {
IR::Inst* const rhs_inst{rhs.InstRecursive()};
- if (rhs_inst->Opcode() == inst.Opcode() && rhs_inst->Arg(1).IsImmediate()) {
+ if (rhs_inst->GetOpcode() == inst.GetOpcode() && rhs_inst->Arg(1).IsImmediate()) {
const auto combined{imm_fn(Arg<T>(lhs), Arg<T>(rhs_inst->Arg(1)))};
inst.SetArg(0, rhs_inst->Arg(0));
inst.SetArg(1, IR::Value{combined});
@@ -70,7 +70,7 @@ bool FoldCommutative(IR::Inst& inst, ImmFn&& imm_fn) {
}
if (!is_lhs_immediate && is_rhs_immediate) {
const IR::Inst* const lhs_inst{lhs.InstRecursive()};
- if (lhs_inst->Opcode() == inst.Opcode() && lhs_inst->Arg(1).IsImmediate()) {
+ if (lhs_inst->GetOpcode() == inst.GetOpcode() && lhs_inst->Arg(1).IsImmediate()) {
const auto combined{imm_fn(Arg<T>(rhs), Arg<T>(lhs_inst->Arg(1)))};
inst.SetArg(0, lhs_inst->Arg(0));
inst.SetArg(1, IR::Value{combined});
@@ -123,7 +123,8 @@ bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
return false;
}
IR::Inst* const lhs_shl{lhs_arg.InstRecursive()};
- if (lhs_shl->Opcode() != IR::Opcode::ShiftLeftLogical32 || lhs_shl->Arg(1) != IR::Value{16U}) {
+ if (lhs_shl->GetOpcode() != IR::Opcode::ShiftLeftLogical32 ||
+ lhs_shl->Arg(1) != IR::Value{16U}) {
return false;
}
if (lhs_shl->Arg(0).IsImmediate()) {
@@ -131,7 +132,7 @@ bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
}
IR::Inst* const lhs_mul{lhs_shl->Arg(0).InstRecursive()};
IR::Inst* const rhs_mul{rhs_arg.InstRecursive()};
- if (lhs_mul->Opcode() != IR::Opcode::IMul32 || rhs_mul->Opcode() != IR::Opcode::IMul32) {
+ if (lhs_mul->GetOpcode() != IR::Opcode::IMul32 || rhs_mul->GetOpcode() != IR::Opcode::IMul32) {
return false;
}
if (lhs_mul->Arg(1).Resolve() != rhs_mul->Arg(1).Resolve()) {
@@ -143,10 +144,10 @@ bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
}
IR::Inst* const lhs_bfe{lhs_mul->Arg(0).InstRecursive()};
IR::Inst* const rhs_bfe{rhs_mul->Arg(0).InstRecursive()};
- if (lhs_bfe->Opcode() != IR::Opcode::BitFieldUExtract) {
+ if (lhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
return false;
}
- if (rhs_bfe->Opcode() != IR::Opcode::BitFieldUExtract) {
+ if (rhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
return false;
}
if (lhs_bfe->Arg(1) != IR::Value{16U} || lhs_bfe->Arg(2) != IR::Value{16U}) {
@@ -194,8 +195,9 @@ void FoldISub32(IR::Inst& inst) {
// ISub32 is generally used to subtract two constant buffers, compare and replace this with
// zero if they equal.
const auto equal_cbuf{[](IR::Inst* a, IR::Inst* b) {
- return a->Opcode() == IR::Opcode::GetCbufU32 && b->Opcode() == IR::Opcode::GetCbufU32 &&
- a->Arg(0) == b->Arg(0) && a->Arg(1) == b->Arg(1);
+ return a->GetOpcode() == IR::Opcode::GetCbufU32 &&
+ b->GetOpcode() == IR::Opcode::GetCbufU32 && a->Arg(0) == b->Arg(0) &&
+ a->Arg(1) == b->Arg(1);
}};
IR::Inst* op_a{inst.Arg(0).InstRecursive()};
IR::Inst* op_b{inst.Arg(1).InstRecursive()};
@@ -204,15 +206,15 @@ void FoldISub32(IR::Inst& inst) {
return;
}
// It's also possible a value is being added to a cbuf and then subtracted
- if (op_b->Opcode() == IR::Opcode::IAdd32) {
+ if (op_b->GetOpcode() == IR::Opcode::IAdd32) {
// Canonicalize local variables to simplify the following logic
std::swap(op_a, op_b);
}
- if (op_b->Opcode() != IR::Opcode::GetCbufU32) {
+ if (op_b->GetOpcode() != IR::Opcode::GetCbufU32) {
return;
}
IR::Inst* const inst_cbuf{op_b};
- if (op_a->Opcode() != IR::Opcode::IAdd32) {
+ if (op_a->GetOpcode() != IR::Opcode::IAdd32) {
return;
}
IR::Value add_op_a{op_a->Arg(0)};
@@ -250,7 +252,8 @@ void FoldFPMul32(IR::Inst& inst) {
}
IR::Inst* const lhs_op{lhs_value.InstRecursive()};
IR::Inst* const rhs_op{rhs_value.InstRecursive()};
- if (lhs_op->Opcode() != IR::Opcode::FPMul32 || rhs_op->Opcode() != IR::Opcode::FPRecip32) {
+ if (lhs_op->GetOpcode() != IR::Opcode::FPMul32 ||
+ rhs_op->GetOpcode() != IR::Opcode::FPRecip32) {
return;
}
const IR::Value recip_source{rhs_op->Arg(0)};
@@ -260,8 +263,8 @@ void FoldFPMul32(IR::Inst& inst) {
}
IR::Inst* const attr_a{recip_source.InstRecursive()};
IR::Inst* const attr_b{lhs_mul_source.InstRecursive()};
- if (attr_a->Opcode() != IR::Opcode::GetAttribute ||
- attr_b->Opcode() != IR::Opcode::GetAttribute) {
+ if (attr_a->GetOpcode() != IR::Opcode::GetAttribute ||
+ attr_b->GetOpcode() != IR::Opcode::GetAttribute) {
return;
}
if (attr_a->Arg(0).Attribute() == attr_b->Arg(0).Attribute()) {
@@ -304,7 +307,7 @@ void FoldLogicalNot(IR::Inst& inst) {
return;
}
IR::Inst* const arg{value.InstRecursive()};
- if (arg->Opcode() == IR::Opcode::LogicalNot) {
+ if (arg->GetOpcode() == IR::Opcode::LogicalNot) {
inst.ReplaceUsesWith(arg->Arg(0));
}
}
@@ -317,12 +320,12 @@ void FoldBitCast(IR::Inst& inst, IR::Opcode reverse) {
return;
}
IR::Inst* const arg_inst{value.InstRecursive()};
- if (arg_inst->Opcode() == reverse) {
+ if (arg_inst->GetOpcode() == reverse) {
inst.ReplaceUsesWith(arg_inst->Arg(0));
return;
}
if constexpr (op == IR::Opcode::BitCastF32U32) {
- if (arg_inst->Opcode() == IR::Opcode::GetCbufU32) {
+ if (arg_inst->GetOpcode() == IR::Opcode::GetCbufU32) {
// Replace the bitcast with a typed constant buffer read
inst.ReplaceOpcode(IR::Opcode::GetCbufF32);
inst.SetArg(0, arg_inst->Arg(0));
@@ -338,7 +341,7 @@ void FoldInverseFunc(IR::Inst& inst, IR::Opcode reverse) {
return;
}
IR::Inst* const arg_inst{value.InstRecursive()};
- if (arg_inst->Opcode() == reverse) {
+ if (arg_inst->GetOpcode() == reverse) {
inst.ReplaceUsesWith(arg_inst->Arg(0));
return;
}
@@ -347,7 +350,7 @@ void FoldInverseFunc(IR::Inst& inst, IR::Opcode reverse) {
template <typename Func, size_t... I>
IR::Value EvalImmediates(const IR::Inst& inst, Func&& func, std::index_sequence<I...>) {
using Traits = LambdaTraits<decltype(func)>;
- return IR::Value{func(Arg<Traits::ArgType<I>>(inst.Arg(I))...)};
+ return IR::Value{func(Arg<typename Traits::template ArgType<I>>(inst.Arg(I))...)};
}
void FoldBranchConditional(IR::Inst& inst) {
@@ -357,7 +360,7 @@ void FoldBranchConditional(IR::Inst& inst) {
return;
}
const IR::Inst* cond_inst{cond.InstRecursive()};
- if (cond_inst->Opcode() == IR::Opcode::LogicalNot) {
+ if (cond_inst->GetOpcode() == IR::Opcode::LogicalNot) {
const IR::Value true_label{inst.Arg(1)};
const IR::Value false_label{inst.Arg(2)};
// Remove negation on the conditional (take the parameter out of LogicalNot) and swap
@@ -371,10 +374,10 @@ void FoldBranchConditional(IR::Inst& inst) {
std::optional<IR::Value> FoldCompositeExtractImpl(IR::Value inst_value, IR::Opcode insert,
IR::Opcode construct, u32 first_index) {
IR::Inst* const inst{inst_value.InstRecursive()};
- if (inst->Opcode() == construct) {
+ if (inst->GetOpcode() == construct) {
return inst->Arg(first_index);
}
- if (inst->Opcode() != insert) {
+ if (inst->GetOpcode() != insert) {
return std::nullopt;
}
IR::Value value_index{inst->Arg(2)};
@@ -410,7 +413,7 @@ void FoldCompositeExtract(IR::Inst& inst, IR::Opcode construct, IR::Opcode inser
}
void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::GetRegister:
return FoldGetRegister(inst);
case IR::Opcode::GetPred:
diff --git a/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp b/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
index 0858a0bddd..90a65dd167 100644
--- a/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
+++ b/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
@@ -57,7 +57,7 @@ struct StorageInfo {
/// Returns true when the instruction is a global memory instruction
bool IsGlobalMemory(const IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::LoadGlobalS8:
case IR::Opcode::LoadGlobalU8:
case IR::Opcode::LoadGlobalS16:
@@ -80,7 +80,7 @@ bool IsGlobalMemory(const IR::Inst& inst) {
/// Returns true when the instruction is a global memory instruction
bool IsGlobalMemoryWrite(const IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::WriteGlobalS8:
case IR::Opcode::WriteGlobalU8:
case IR::Opcode::WriteGlobalS16:
@@ -140,7 +140,7 @@ bool MeetsBias(const StorageBufferAddr& storage_buffer, const Bias& bias) noexce
void DiscardGlobalMemory(IR::Block& block, IR::Inst& inst) {
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
const IR::Value zero{u32{0}};
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::LoadGlobalS8:
case IR::Opcode::LoadGlobalU8:
case IR::Opcode::LoadGlobalS16:
@@ -164,7 +164,7 @@ void DiscardGlobalMemory(IR::Block& block, IR::Inst& inst) {
inst.Invalidate();
break;
default:
- throw LogicError("Invalid opcode to discard its global memory operation {}", inst.Opcode());
+ throw LogicError("Invalid opcode to discard its global memory operation {}", inst.GetOpcode());
}
}
@@ -184,7 +184,7 @@ std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
// This address is expected to either be a PackUint2x32 or a IAdd64
IR::Inst* addr_inst{addr.InstRecursive()};
s32 imm_offset{0};
- if (addr_inst->Opcode() == IR::Opcode::IAdd64) {
+ if (addr_inst->GetOpcode() == IR::Opcode::IAdd64) {
// If it's an IAdd64, get the immediate offset it is applying and grab the address
// instruction. This expects for the instruction to be canonicalized having the address on
// the first argument and the immediate offset on the second one.
@@ -200,7 +200,7 @@ std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
addr_inst = iadd_addr.Inst();
}
// With IAdd64 handled, now PackUint2x32 is expected without exceptions
- if (addr_inst->Opcode() != IR::Opcode::PackUint2x32) {
+ if (addr_inst->GetOpcode() != IR::Opcode::PackUint2x32) {
return std::nullopt;
}
// PackUint2x32 is expected to be generated from a vector
@@ -210,20 +210,20 @@ std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
}
// This vector is expected to be a CompositeConstructU32x2
IR::Inst* const vector_inst{vector.InstRecursive()};
- if (vector_inst->Opcode() != IR::Opcode::CompositeConstructU32x2) {
+ if (vector_inst->GetOpcode() != IR::Opcode::CompositeConstructU32x2) {
return std::nullopt;
}
// Grab the first argument from the CompositeConstructU32x2, this is the low address.
return LowAddrInfo{
.value{IR::U32{vector_inst->Arg(0)}},
- .imm_offset{imm_offset},
+ .imm_offset = imm_offset,
};
}
/// Tries to track the storage buffer address used by a global memory instruction
std::optional<StorageBufferAddr> Track(const IR::Value& value, const Bias* bias) {
const auto pred{[bias](const IR::Inst* inst) -> std::optional<StorageBufferAddr> {
- if (inst->Opcode() != IR::Opcode::GetCbufU32) {
+ if (inst->GetOpcode() != IR::Opcode::GetCbufU32) {
return std::nullopt;
}
const IR::Value index{inst->Arg(0)};
@@ -256,9 +256,9 @@ void CollectStorageBuffers(IR::Block& block, IR::Inst& inst, StorageInfo& info)
// NVN puts storage buffers in a specific range, we have to bias towards these addresses to
// avoid getting false positives
static constexpr Bias nvn_bias{
- .index{0},
- .offset_begin{0x110},
- .offset_end{0x610},
+ .index = 0,
+ .offset_begin = 0x110,
+ .offset_end = 0x610,
};
// Track the low address of the instruction
const std::optional<LowAddrInfo> low_addr_info{TrackLowAddress(&inst)};
@@ -286,8 +286,8 @@ void CollectStorageBuffers(IR::Block& block, IR::Inst& inst, StorageInfo& info)
info.set.insert(*storage_buffer);
info.to_replace.push_back(StorageInst{
.storage_buffer{*storage_buffer},
- .inst{&inst},
- .block{&block},
+ .inst = &inst,
+ .block = &block,
});
}
@@ -312,7 +312,7 @@ IR::U32 StorageOffset(IR::Block& block, IR::Inst& inst, StorageBufferAddr buffer
/// Replace a global memory load instruction with its storage buffer equivalent
void ReplaceLoad(IR::Block& block, IR::Inst& inst, const IR::U32& storage_index,
const IR::U32& offset) {
- const IR::Opcode new_opcode{GlobalToStorage(inst.Opcode())};
+ const IR::Opcode new_opcode{GlobalToStorage(inst.GetOpcode())};
const auto it{IR::Block::InstructionList::s_iterator_to(inst)};
const IR::Value value{&*block.PrependNewInst(it, new_opcode, {storage_index, offset})};
inst.ReplaceUsesWith(value);
@@ -321,7 +321,7 @@ void ReplaceLoad(IR::Block& block, IR::Inst& inst, const IR::U32& storage_index,
/// Replace a global memory write instruction with its storage buffer equivalent
void ReplaceWrite(IR::Block& block, IR::Inst& inst, const IR::U32& storage_index,
const IR::U32& offset) {
- const IR::Opcode new_opcode{GlobalToStorage(inst.Opcode())};
+ const IR::Opcode new_opcode{GlobalToStorage(inst.GetOpcode())};
const auto it{IR::Block::InstructionList::s_iterator_to(inst)};
block.PrependNewInst(it, new_opcode, {storage_index, offset, inst.Arg(1)});
inst.Invalidate();
@@ -330,7 +330,7 @@ void ReplaceWrite(IR::Block& block, IR::Inst& inst, const IR::U32& storage_index
/// Replace a global memory instruction with its storage buffer equivalent
void Replace(IR::Block& block, IR::Inst& inst, const IR::U32& storage_index,
const IR::U32& offset) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::LoadGlobalS8:
case IR::Opcode::LoadGlobalU8:
case IR::Opcode::LoadGlobalS16:
@@ -348,7 +348,7 @@ void Replace(IR::Block& block, IR::Inst& inst, const IR::U32& storage_index,
case IR::Opcode::WriteGlobal128:
return ReplaceWrite(block, inst, storage_index, offset);
default:
- throw InvalidArgument("Invalid global memory opcode {}", inst.Opcode());
+ throw InvalidArgument("Invalid global memory opcode {}", inst.GetOpcode());
}
}
} // Anonymous namespace
@@ -366,9 +366,9 @@ void GlobalMemoryToStorageBufferPass(IR::Program& program) {
u32 storage_index{};
for (const StorageBufferAddr& storage_buffer : info.set) {
program.info.storage_buffers_descriptors.push_back({
- .cbuf_index{storage_buffer.index},
- .cbuf_offset{storage_buffer.offset},
- .count{1},
+ .cbuf_index = storage_buffer.index,
+ .cbuf_offset = storage_buffer.offset,
+ .count = 1,
.is_written{info.writes.contains(storage_buffer)},
});
++storage_index;
diff --git a/src/shader_recompiler/ir_opt/identity_removal_pass.cpp b/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
index 8790b48f21..38af72dfea 100644
--- a/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
+++ b/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
@@ -22,7 +22,8 @@ void IdentityRemovalPass(IR::Program& program) {
inst->SetArg(i, arg.Inst()->Arg(0));
}
}
- if (inst->Opcode() == IR::Opcode::Identity || inst->Opcode() == IR::Opcode::Void) {
+ if (inst->GetOpcode() == IR::Opcode::Identity ||
+ inst->GetOpcode() == IR::Opcode::Void) {
to_invalidate.push_back(&*inst);
inst = block->Instructions().erase(inst);
} else {
diff --git a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
index 0d2c91ed61..52576b07fc 100644
--- a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
+++ b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
@@ -123,7 +123,7 @@ IR::Opcode Replace(IR::Opcode op) {
void LowerFp16ToFp32(IR::Program& program) {
for (IR::Block* const block : program.blocks) {
for (IR::Inst& inst : block->Instructions()) {
- inst.ReplaceOpcode(Replace(inst.Opcode()));
+ inst.ReplaceOpcode(Replace(inst.GetOpcode()));
}
}
}
diff --git a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
index ca36253d14..346fcc3774 100644
--- a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
+++ b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
@@ -116,7 +116,7 @@ IR::Opcode UndefOpcode(IndirectBranchVariable) noexcept {
}
[[nodiscard]] bool IsPhi(const IR::Inst& inst) noexcept {
- return inst.Opcode() == IR::Opcode::Phi;
+ return inst.GetOpcode() == IR::Opcode::Phi;
}
enum class Status {
@@ -278,7 +278,7 @@ private:
};
void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::SetRegister:
if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
pass.WriteVariable(reg, block, inst.Arg(1));
diff --git a/src/shader_recompiler/ir_opt/texture_pass.cpp b/src/shader_recompiler/ir_opt/texture_pass.cpp
index 290ce41791..c8aee3d3d5 100644
--- a/src/shader_recompiler/ir_opt/texture_pass.cpp
+++ b/src/shader_recompiler/ir_opt/texture_pass.cpp
@@ -30,7 +30,7 @@ struct TextureInst {
using TextureInstVector = boost::container::small_vector<TextureInst, 24>;
IR::Opcode IndexedInstruction(const IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::BindlessImageSampleImplicitLod:
case IR::Opcode::BoundImageSampleImplicitLod:
return IR::Opcode::ImageSampleImplicitLod;
@@ -67,7 +67,7 @@ IR::Opcode IndexedInstruction(const IR::Inst& inst) {
}
bool IsBindless(const IR::Inst& inst) {
- switch (inst.Opcode()) {
+ switch (inst.GetOpcode()) {
case IR::Opcode::BindlessImageSampleImplicitLod:
case IR::Opcode::BindlessImageSampleExplicitLod:
case IR::Opcode::BindlessImageSampleDrefImplicitLod:
@@ -91,7 +91,7 @@ bool IsBindless(const IR::Inst& inst) {
case IR::Opcode::BoundImageGradient:
return false;
default:
- throw InvalidArgument("Invalid opcode {}", inst.Opcode());
+ throw InvalidArgument("Invalid opcode {}", inst.GetOpcode());
}
}
@@ -100,7 +100,7 @@ bool IsTextureInstruction(const IR::Inst& inst) {
}
std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst) {
- if (inst->Opcode() != IR::Opcode::GetCbufU32) {
+ if (inst->GetOpcode() != IR::Opcode::GetCbufU32) {
return std::nullopt;
}
const IR::Value index{inst->Arg(0)};
@@ -134,14 +134,14 @@ TextureInst MakeInst(Environment& env, IR::Block* block, IR::Inst& inst) {
addr = *track_addr;
} else {
addr = ConstBufferAddr{
- .index{env.TextureBoundBuffer()},
- .offset{inst.Arg(0).U32()},
+ .index = env.TextureBoundBuffer(),
+ .offset = inst.Arg(0).U32(),
};
}
return TextureInst{
.cbuf{addr},
- .inst{&inst},
- .block{block},
+ .inst = &inst,
+ .block = block,
};
}
@@ -211,7 +211,7 @@ void TexturePass(Environment& env, IR::Program& program) {
const auto& cbuf{texture_inst.cbuf};
auto flags{inst->Flags<IR::TextureInstInfo>()};
- switch (inst->Opcode()) {
+ switch (inst->GetOpcode()) {
case IR::Opcode::ImageQueryDimensions:
flags.type.Assign(env.ReadTextureType(cbuf.index, cbuf.offset));
inst->SetFlags(flags);
@@ -235,16 +235,16 @@ void TexturePass(Environment& env, IR::Program& program) {
u32 index;
if (flags.type == TextureType::Buffer) {
index = descriptors.Add(TextureBufferDescriptor{
- .cbuf_index{cbuf.index},
- .cbuf_offset{cbuf.offset},
- .count{1},
+ .cbuf_index = cbuf.index,
+ .cbuf_offset = cbuf.offset,
+ .count = 1,
});
} else {
index = descriptors.Add(TextureDescriptor{
- .type{flags.type},
- .cbuf_index{cbuf.index},
- .cbuf_offset{cbuf.offset},
- .count{1},
+ .type = flags.type,
+ .cbuf_index = cbuf.index,
+ .cbuf_offset = cbuf.offset,
+ .count = 1,
});
}
inst->SetArg(0, IR::Value{index});
diff --git a/src/shader_recompiler/ir_opt/verification_pass.cpp b/src/shader_recompiler/ir_opt/verification_pass.cpp
index 4080b37cca..dbec96d84a 100644
--- a/src/shader_recompiler/ir_opt/verification_pass.cpp
+++ b/src/shader_recompiler/ir_opt/verification_pass.cpp
@@ -14,14 +14,14 @@ namespace Shader::Optimization {
static void ValidateTypes(const IR::Program& program) {
for (const auto& block : program.blocks) {
for (const IR::Inst& inst : *block) {
- if (inst.Opcode() == IR::Opcode::Phi) {
+ if (inst.GetOpcode() == IR::Opcode::Phi) {
// Skip validation on phi nodes
continue;
}
const size_t num_args{inst.NumArgs()};
for (size_t i = 0; i < num_args; ++i) {
const IR::Type t1{inst.Arg(i).Type()};
- const IR::Type t2{IR::ArgTypeOf(inst.Opcode(), i)};
+ const IR::Type t2{IR::ArgTypeOf(inst.GetOpcode(), i)};
if (!IR::AreTypesCompatible(t1, t2)) {
throw LogicError("Invalid types in block:\n{}", IR::DumpBlock(*block));
}
diff --git a/src/tests/common/unique_function.cpp b/src/tests/common/unique_function.cpp
index ac9912738a..aa6e865934 100644
--- a/src/tests/common/unique_function.cpp
+++ b/src/tests/common/unique_function.cpp
@@ -17,10 +17,12 @@ struct Noisy {
Noisy& operator=(Noisy&& rhs) noexcept {
state = "Move assigned";
rhs.state = "Moved away";
+ return *this;
}
Noisy(const Noisy&) : state{"Copied constructed"} {}
Noisy& operator=(const Noisy&) {
state = "Copied assigned";
+ return *this;
}
std::string state;
diff --git a/src/video_core/CMakeLists.txt b/src/video_core/CMakeLists.txt
index 71b07c1940..3166a69dc1 100644
--- a/src/video_core/CMakeLists.txt
+++ b/src/video_core/CMakeLists.txt
@@ -203,7 +203,7 @@ add_library(video_core STATIC
create_target_directory_groups(video_core)
target_link_libraries(video_core PUBLIC common core)
-target_link_libraries(video_core PRIVATE glad shader_recompiler xbyak)
+target_link_libraries(video_core PUBLIC glad shader_recompiler xbyak)
if (YUZU_USE_BUNDLED_FFMPEG AND NOT WIN32)
add_dependencies(video_core ffmpeg-build)
diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
index 893258b4aa..57e2d569c2 100644
--- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
+++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
@@ -447,7 +447,7 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
.dynamicStateCount = static_cast<u32>(dynamic_states.size()),
.pDynamicStates = dynamic_states.data(),
};
- const VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT subgroup_size_ci{
+ [[maybe_unused]] const VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT subgroup_size_ci{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO_EXT,
.pNext = nullptr,
.requiredSubgroupSize = GuestWarpSize,
@@ -457,15 +457,16 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
if (!spv_modules[stage]) {
continue;
}
- [[maybe_unused]] auto& stage_ci = shader_stages.emplace_back(VkPipelineShaderStageCreateInfo{
- .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
- .pNext = nullptr,
- .flags = 0,
- .stage = MaxwellToVK::ShaderStage(static_cast<Tegra::Engines::ShaderType>(stage)),
- .module = *spv_modules[stage],
- .pName = "main",
- .pSpecializationInfo = nullptr,
- });
+ [[maybe_unused]] auto& stage_ci =
+ shader_stages.emplace_back(VkPipelineShaderStageCreateInfo{
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+ .pNext = nullptr,
+ .flags = 0,
+ .stage = MaxwellToVK::ShaderStage(static_cast<Tegra::Engines::ShaderType>(stage)),
+ .module = *spv_modules[stage],
+ .pName = "main",
+ .pSpecializationInfo = nullptr,
+ });
/*
if (program[stage]->entries.uses_warps && device.IsGuestWarpSizeSupported(stage_ci.stage)) {
stage_ci.pNext = &subgroup_size_ci;
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
index 23bf84a92f..fcebb8f6e2 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
@@ -47,7 +47,7 @@ auto MakeSpan(Container& container) {
return std::span(container.data(), container.size());
}
-u64 MakeCbufKey(u32 index, u32 offset) {
+static u64 MakeCbufKey(u32 index, u32 offset) {
return (static_cast<u64>(index) << 32) | offset;
}
@@ -638,6 +638,7 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, Tegra::GPU& gpu_,
.warp_size_potentially_larger_than_guest = device.IsWarpSizePotentiallyBiggerThanGuest(),
.has_broken_spirv_clamp = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS_KHR,
.generic_input_types{},
+ .fixed_state_point_size{},
};
}
@@ -748,7 +749,7 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline(
Shader::Environment& env{*envs[env_index]};
++env_index;
- const u32 cfg_offset{env.StartAddress() + sizeof(Shader::ProgramHeader)};
+ const u32 cfg_offset{static_cast<u32>(env.StartAddress() + sizeof(Shader::ProgramHeader))};
Shader::Maxwell::Flow::CFG cfg(env, pools.flow_block, cfg_offset);
programs[index] = TranslateProgram(pools.inst, pools.block, env, cfg);
}
diff --git a/src/video_core/renderer_vulkan/vk_render_pass_cache.cpp b/src/video_core/renderer_vulkan/vk_render_pass_cache.cpp
index b2dcd74ab9..991afe521e 100644
--- a/src/video_core/renderer_vulkan/vk_render_pass_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_render_pass_cache.cpp
@@ -2,8 +2,6 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
-#pragma once
-
#include <unordered_map>
#include <boost/container/static_vector.hpp>
diff --git a/src/video_core/renderer_vulkan/vk_texture_cache.cpp b/src/video_core/renderer_vulkan/vk_texture_cache.cpp
index e42b091c5f..70328680dd 100644
--- a/src/video_core/renderer_vulkan/vk_texture_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_texture_cache.cpp
@@ -279,7 +279,7 @@ constexpr VkBorderColor ConvertBorderColor(const std::array<float, 4>& color) {
};
}
-[[nodiscard]] std::vector<VkBufferCopy> TransformBufferCopies(
+[[maybe_unused]] [[nodiscard]] std::vector<VkBufferCopy> TransformBufferCopies(
std::span<const VideoCommon::BufferCopy> copies, size_t buffer_offset) {
std::vector<VkBufferCopy> result(copies.size());
std::ranges::transform(
--
cgit v1.2.3-70-g09d2
From 050e81500c002f304d581f28700de549b828a2bc Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Wed, 21 Apr 2021 00:35:47 -0300
Subject: shader: Move microinstruction header to the value header
---
src/shader_recompiler/CMakeLists.txt | 1 -
src/shader_recompiler/backend/spirv/emit_spirv.cpp | 1 -
src/shader_recompiler/backend/spirv/emit_spirv.h | 1 -
src/shader_recompiler/frontend/ir/basic_block.h | 1 -
.../frontend/ir/breadth_first_search.h | 1 -
.../frontend/ir/microinstruction.cpp | 2 +-
.../frontend/ir/microinstruction.h | 162 ---------------------
src/shader_recompiler/frontend/ir/program.cpp | 2 +-
src/shader_recompiler/frontend/ir/value.cpp | 1 -
src/shader_recompiler/frontend/ir/value.h | 151 ++++++++++++++++++-
.../frontend/maxwell/structured_control_flow.h | 2 +-
.../ir_opt/collect_shader_info_pass.cpp | 2 +-
.../ir_opt/constant_propagation_pass.cpp | 2 +-
.../ir_opt/dead_code_elimination_pass.cpp | 2 +-
.../global_memory_to_storage_buffer_pass.cpp | 2 +-
.../ir_opt/identity_removal_pass.cpp | 2 +-
.../ir_opt/lower_fp16_to_fp32.cpp | 2 +-
src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp | 2 +-
src/shader_recompiler/ir_opt/verification_pass.cpp | 2 +-
src/video_core/renderer_vulkan/vk_pipeline_cache.h | 2 +-
20 files changed, 162 insertions(+), 181 deletions(-)
delete mode 100644 src/shader_recompiler/frontend/ir/microinstruction.h
(limited to 'src/shader_recompiler/frontend/ir/program.cpp')
diff --git a/src/shader_recompiler/CMakeLists.txt b/src/shader_recompiler/CMakeLists.txt
index 07963a7607..3d7506de2d 100644
--- a/src/shader_recompiler/CMakeLists.txt
+++ b/src/shader_recompiler/CMakeLists.txt
@@ -36,7 +36,6 @@ add_library(shader_recompiler STATIC
frontend/ir/ir_emitter.cpp
frontend/ir/ir_emitter.h
frontend/ir/microinstruction.cpp
- frontend/ir/microinstruction.h
frontend/ir/modifiers.h
frontend/ir/opcodes.cpp
frontend/ir/opcodes.h
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index 5d6fdeb65a..815b3cd957 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -10,7 +10,6 @@
#include "shader_recompiler/backend/spirv/emit_spirv.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/program.h"
namespace Shader::Backend::SPIRV {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 89a82e8581..4562db45b4 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -8,7 +8,6 @@
#include "common/common_types.h"
#include "shader_recompiler/backend/spirv/emit_context.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/program.h"
#include "shader_recompiler/profile.h"
diff --git a/src/shader_recompiler/frontend/ir/basic_block.h b/src/shader_recompiler/frontend/ir/basic_block.h
index 3a42307557..ab7ddb3d52 100644
--- a/src/shader_recompiler/frontend/ir/basic_block.h
+++ b/src/shader_recompiler/frontend/ir/basic_block.h
@@ -13,7 +13,6 @@
#include "common/bit_cast.h"
#include "shader_recompiler/frontend/ir/condition.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/object_pool.h"
diff --git a/src/shader_recompiler/frontend/ir/breadth_first_search.h b/src/shader_recompiler/frontend/ir/breadth_first_search.h
index b35f062d43..a52ccbd58b 100644
--- a/src/shader_recompiler/frontend/ir/breadth_first_search.h
+++ b/src/shader_recompiler/frontend/ir/breadth_first_search.h
@@ -10,7 +10,6 @@
#include <boost/container/small_vector.hpp>
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/value.h"
namespace Shader::IR {
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index 41f9fa0cd8..701746a0cc 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -6,8 +6,8 @@
#include <memory>
#include "shader_recompiler/exception.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/type.h"
+#include "shader_recompiler/frontend/ir/value.h"
namespace Shader::IR {
namespace {
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.h b/src/shader_recompiler/frontend/ir/microinstruction.h
deleted file mode 100644
index ea55fc29cc..0000000000
--- a/src/shader_recompiler/frontend/ir/microinstruction.h
+++ /dev/null
@@ -1,162 +0,0 @@
-// Copyright 2021 yuzu Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#pragma once
-
-#include <array>
-#include <cstring>
-#include <type_traits>
-#include <utility>
-#include <vector>
-
-#include <boost/container/small_vector.hpp>
-#include <boost/intrusive/list.hpp>
-
-#include "common/bit_cast.h"
-#include "common/common_types.h"
-#include "shader_recompiler/frontend/ir/opcodes.h"
-#include "shader_recompiler/frontend/ir/type.h"
-#include "shader_recompiler/frontend/ir/value.h"
-
-namespace Shader::IR {
-
-class Block;
-
-struct AssociatedInsts;
-
-class Inst : public boost::intrusive::list_base_hook<> {
-public:
- explicit Inst(Opcode op_, u32 flags_) noexcept;
- ~Inst();
-
- Inst& operator=(const Inst&) = delete;
- Inst(const Inst&) = delete;
-
- Inst& operator=(Inst&&) = delete;
- Inst(Inst&&) = delete;
-
- /// Get the number of uses this instruction has.
- [[nodiscard]] int UseCount() const noexcept {
- return use_count;
- }
-
- /// Determines whether this instruction has uses or not.
- [[nodiscard]] bool HasUses() const noexcept {
- return use_count > 0;
- }
-
- /// Get the opcode this microinstruction represents.
- [[nodiscard]] IR::Opcode GetOpcode() const noexcept {
- return op;
- }
-
- /// Determines if there is a pseudo-operation associated with this instruction.
- [[nodiscard]] bool HasAssociatedPseudoOperation() const noexcept {
- return associated_insts != nullptr;
- }
-
- /// Determines whether or not this instruction may have side effects.
- [[nodiscard]] bool MayHaveSideEffects() const noexcept;
-
- /// Determines whether or not this instruction is a pseudo-instruction.
- /// Pseudo-instructions depend on their parent instructions for their semantics.
- [[nodiscard]] bool IsPseudoInstruction() const noexcept;
-
- /// Determines if all arguments of this instruction are immediates.
- [[nodiscard]] bool AreAllArgsImmediates() const;
-
- /// Gets a pseudo-operation associated with this instruction
- [[nodiscard]] Inst* GetAssociatedPseudoOperation(IR::Opcode opcode);
-
- /// Get the type this instruction returns.
- [[nodiscard]] IR::Type Type() const;
-
- /// Get the number of arguments this instruction has.
- [[nodiscard]] size_t NumArgs() const {
- return op == Opcode::Phi ? phi_args.size() : NumArgsOf(op);
- }
-
- /// Get the value of a given argument index.
- [[nodiscard]] Value Arg(size_t index) const noexcept {
- if (op == Opcode::Phi) {
- return phi_args[index].second;
- } else {
- return args[index];
- }
- }
-
- /// Set the value of a given argument index.
- void SetArg(size_t index, Value value);
-
- /// Get a pointer to the block of a phi argument.
- [[nodiscard]] Block* PhiBlock(size_t index) const;
- /// Add phi operand to a phi instruction.
- void AddPhiOperand(Block* predecessor, const Value& value);
-
- void Invalidate();
- void ClearArgs();
-
- void ReplaceUsesWith(Value replacement);
-
- void ReplaceOpcode(IR::Opcode opcode);
-
- template <typename FlagsType>
- requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
- [[nodiscard]] FlagsType Flags() const noexcept {
- FlagsType ret;
- std::memcpy(reinterpret_cast<char*>(&ret), &flags, sizeof(ret));
- return ret;
- }
-
- template <typename FlagsType>
- requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
- [[nodiscard]] void SetFlags(FlagsType value) noexcept {
- std::memcpy(&flags, &value, sizeof(value));
- }
-
- /// Intrusively store the host definition of this instruction.
- template <typename DefinitionType>
- void SetDefinition(DefinitionType def) {
- definition = Common::BitCast<u32>(def);
- }
-
- /// Return the intrusively stored host definition of this instruction.
- template <typename DefinitionType>
- [[nodiscard]] DefinitionType Definition() const noexcept {
- return Common::BitCast<DefinitionType>(definition);
- }
-
-private:
- struct NonTriviallyDummy {
- NonTriviallyDummy() noexcept {}
- };
-
- void Use(const Value& value);
- void UndoUse(const Value& value);
-
- IR::Opcode op{};
- int use_count{};
- u32 flags{};
- u32 definition{};
- union {
- NonTriviallyDummy dummy{};
- boost::container::small_vector<std::pair<Block*, Value>, 2> phi_args;
- std::array<Value, 5> args;
- };
- std::unique_ptr<AssociatedInsts> associated_insts;
-};
-static_assert(sizeof(Inst) <= 128, "Inst size unintentionally increased");
-
-struct AssociatedInsts {
- union {
- Inst* in_bounds_inst;
- Inst* sparse_inst;
- Inst* zero_inst{};
- };
- Inst* sign_inst{};
- Inst* carry_inst{};
- Inst* overflow_inst{};
-};
-
-} // namespace Shader::IR
diff --git a/src/shader_recompiler/frontend/ir/program.cpp b/src/shader_recompiler/frontend/ir/program.cpp
index 89a17fb1b4..3fc06f8551 100644
--- a/src/shader_recompiler/frontend/ir/program.cpp
+++ b/src/shader_recompiler/frontend/ir/program.cpp
@@ -8,8 +8,8 @@
#include <fmt/format.h>
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/program.h"
+#include "shader_recompiler/frontend/ir/value.h"
namespace Shader::IR {
diff --git a/src/shader_recompiler/frontend/ir/value.cpp b/src/shader_recompiler/frontend/ir/value.cpp
index bf5f8c0c20..a8a919e0e6 100644
--- a/src/shader_recompiler/frontend/ir/value.cpp
+++ b/src/shader_recompiler/frontend/ir/value.cpp
@@ -2,7 +2,6 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/opcodes.h"
#include "shader_recompiler/frontend/ir/value.h"
diff --git a/src/shader_recompiler/frontend/ir/value.h b/src/shader_recompiler/frontend/ir/value.h
index 3037455632..d90a68b377 100644
--- a/src/shader_recompiler/frontend/ir/value.h
+++ b/src/shader_recompiler/frontend/ir/value.h
@@ -4,19 +4,34 @@
#pragma once
+#include <array>
+#include <cstring>
+#include <memory>
+#include <type_traits>
+#include <utility>
+#include <vector>
+
+#include <boost/container/small_vector.hpp>
+#include <boost/intrusive/list.hpp>
+
+#include "common/bit_cast.h"
#include "common/common_types.h"
#include "shader_recompiler/exception.h"
#include "shader_recompiler/frontend/ir/attribute.h"
+#include "shader_recompiler/frontend/ir/opcodes.h"
+#include "shader_recompiler/frontend/ir/patch.h"
#include "shader_recompiler/frontend/ir/pred.h"
#include "shader_recompiler/frontend/ir/reg.h"
-#include "shader_recompiler/frontend/ir/patch.h"
#include "shader_recompiler/frontend/ir/type.h"
+#include "shader_recompiler/frontend/ir/value.h"
namespace Shader::IR {
class Block;
class Inst;
+struct AssociatedInsts;
+
class Value {
public:
Value() noexcept : type{IR::Type::Void}, inst{nullptr} {}
@@ -101,6 +116,140 @@ public:
explicit TypedValue(IR::Inst* inst_) : TypedValue(Value(inst_)) {}
};
+class Inst : public boost::intrusive::list_base_hook<> {
+public:
+ explicit Inst(IR::Opcode op_, u32 flags_) noexcept;
+ ~Inst();
+
+ Inst& operator=(const Inst&) = delete;
+ Inst(const Inst&) = delete;
+
+ Inst& operator=(Inst&&) = delete;
+ Inst(Inst&&) = delete;
+
+ /// Get the number of uses this instruction has.
+ [[nodiscard]] int UseCount() const noexcept {
+ return use_count;
+ }
+
+ /// Determines whether this instruction has uses or not.
+ [[nodiscard]] bool HasUses() const noexcept {
+ return use_count > 0;
+ }
+
+ /// Get the opcode this microinstruction represents.
+ [[nodiscard]] IR::Opcode GetOpcode() const noexcept {
+ return op;
+ }
+
+ /// Determines if there is a pseudo-operation associated with this instruction.
+ [[nodiscard]] bool HasAssociatedPseudoOperation() const noexcept {
+ return associated_insts != nullptr;
+ }
+
+ /// Determines whether or not this instruction may have side effects.
+ [[nodiscard]] bool MayHaveSideEffects() const noexcept;
+
+ /// Determines whether or not this instruction is a pseudo-instruction.
+ /// Pseudo-instructions depend on their parent instructions for their semantics.
+ [[nodiscard]] bool IsPseudoInstruction() const noexcept;
+
+ /// Determines if all arguments of this instruction are immediates.
+ [[nodiscard]] bool AreAllArgsImmediates() const;
+
+ /// Gets a pseudo-operation associated with this instruction
+ [[nodiscard]] Inst* GetAssociatedPseudoOperation(IR::Opcode opcode);
+
+ /// Get the type this instruction returns.
+ [[nodiscard]] IR::Type Type() const;
+
+ /// Get the number of arguments this instruction has.
+ [[nodiscard]] size_t NumArgs() const {
+ return op == IR::Opcode::Phi ? phi_args.size() : NumArgsOf(op);
+ }
+
+ /// Get the value of a given argument index.
+ [[nodiscard]] Value Arg(size_t index) const noexcept {
+ if (op == IR::Opcode::Phi) {
+ return phi_args[index].second;
+ } else {
+ return args[index];
+ }
+ }
+
+ /// Set the value of a given argument index.
+ void SetArg(size_t index, Value value);
+
+ /// Get a pointer to the block of a phi argument.
+ [[nodiscard]] Block* PhiBlock(size_t index) const;
+ /// Add phi operand to a phi instruction.
+ void AddPhiOperand(Block* predecessor, const Value& value);
+
+ void Invalidate();
+ void ClearArgs();
+
+ void ReplaceUsesWith(Value replacement);
+
+ void ReplaceOpcode(IR::Opcode opcode);
+
+ template <typename FlagsType>
+ requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
+ [[nodiscard]] FlagsType Flags() const noexcept {
+ FlagsType ret;
+ std::memcpy(reinterpret_cast<char*>(&ret), &flags, sizeof(ret));
+ return ret;
+ }
+
+ template <typename FlagsType>
+ requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
+ [[nodiscard]] void SetFlags(FlagsType value) noexcept {
+ std::memcpy(&flags, &value, sizeof(value));
+ }
+
+ /// Intrusively store the host definition of this instruction.
+ template <typename DefinitionType>
+ void SetDefinition(DefinitionType def) {
+ definition = Common::BitCast<u32>(def);
+ }
+
+ /// Return the intrusively stored host definition of this instruction.
+ template <typename DefinitionType>
+ [[nodiscard]] DefinitionType Definition() const noexcept {
+ return Common::BitCast<DefinitionType>(definition);
+ }
+
+private:
+ struct NonTriviallyDummy {
+ NonTriviallyDummy() noexcept {}
+ };
+
+ void Use(const Value& value);
+ void UndoUse(const Value& value);
+
+ IR::Opcode op{};
+ int use_count{};
+ u32 flags{};
+ u32 definition{};
+ union {
+ NonTriviallyDummy dummy{};
+ boost::container::small_vector<std::pair<Block*, Value>, 2> phi_args;
+ std::array<Value, 5> args;
+ };
+ std::unique_ptr<AssociatedInsts> associated_insts;
+};
+static_assert(sizeof(Inst) <= 128, "Inst size unintentionally increased");
+
+struct AssociatedInsts {
+ union {
+ Inst* in_bounds_inst;
+ Inst* sparse_inst;
+ Inst* zero_inst{};
+ };
+ Inst* sign_inst{};
+ Inst* carry_inst{};
+ Inst* overflow_inst{};
+};
+
using U1 = TypedValue<Type::U1>;
using U8 = TypedValue<Type::U8>;
using U16 = TypedValue<Type::U16>;
diff --git a/src/shader_recompiler/frontend/maxwell/structured_control_flow.h b/src/shader_recompiler/frontend/maxwell/structured_control_flow.h
index e4797291e2..a6be12ba2e 100644
--- a/src/shader_recompiler/frontend/maxwell/structured_control_flow.h
+++ b/src/shader_recompiler/frontend/maxwell/structured_control_flow.h
@@ -11,7 +11,7 @@
#include "shader_recompiler/environment.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/frontend/maxwell/control_flow.h"
#include "shader_recompiler/object_pool.h"
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index cccf0909de..bb4aeb57c9 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -3,9 +3,9 @@
// Refer to the license.txt file included.
#include "shader_recompiler/environment.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/modifiers.h"
#include "shader_recompiler/frontend/ir/program.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
#include "shader_recompiler/shader_info.h"
diff --git a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
index 2206f93c27..770d3de61b 100644
--- a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
+++ b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
@@ -11,7 +11,7 @@
#include "common/bit_util.h"
#include "shader_recompiler/exception.h"
#include "shader_recompiler/frontend/ir/ir_emitter.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp b/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
index 8ad59f42e0..f9c5334b5d 100644
--- a/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
+++ b/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
@@ -5,7 +5,7 @@
#include <ranges>
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp b/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
index f294d297f6..87eca2a0df 100644
--- a/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
+++ b/src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
@@ -15,7 +15,7 @@
#include "shader_recompiler/frontend/ir/basic_block.h"
#include "shader_recompiler/frontend/ir/breadth_first_search.h"
#include "shader_recompiler/frontend/ir/ir_emitter.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/shader_recompiler/ir_opt/identity_removal_pass.cpp b/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
index 38af72dfea..6afbe24f7f 100644
--- a/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
+++ b/src/shader_recompiler/ir_opt/identity_removal_pass.cpp
@@ -5,7 +5,7 @@
#include <vector>
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
index 62e73d52d9..773e1f9618 100644
--- a/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
+++ b/src/shader_recompiler/ir_opt/lower_fp16_to_fp32.cpp
@@ -5,7 +5,7 @@
#include <algorithm>
#include "shader_recompiler/frontend/ir/ir_emitter.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
index bb1a90004f..fe86a164b7 100644
--- a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
+++ b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp
@@ -23,10 +23,10 @@
#include <boost/container/flat_set.hpp>
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/opcodes.h"
#include "shader_recompiler/frontend/ir/pred.h"
#include "shader_recompiler/frontend/ir/reg.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/shader_recompiler/ir_opt/verification_pass.cpp b/src/shader_recompiler/ir_opt/verification_pass.cpp
index dbec96d84a..62bf5f8ff0 100644
--- a/src/shader_recompiler/ir_opt/verification_pass.cpp
+++ b/src/shader_recompiler/ir_opt/verification_pass.cpp
@@ -6,7 +6,7 @@
#include "shader_recompiler/exception.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/ir_opt/passes.h"
namespace Shader::Optimization {
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.h b/src/video_core/renderer_vulkan/vk_pipeline_cache.h
index 8b6839966f..e12e4422f7 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.h
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.h
@@ -16,7 +16,7 @@
#include "common/common_types.h"
#include "common/thread_worker.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
-#include "shader_recompiler/frontend/ir/microinstruction.h"
+#include "shader_recompiler/frontend/ir/value.h"
#include "shader_recompiler/frontend/maxwell/control_flow.h"
#include "shader_recompiler/object_pool.h"
#include "shader_recompiler/profile.h"
--
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