From 61cd7dd30128633b656ce3264da74bef1ba00bb5 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Mon, 14 Jun 2021 02:27:49 -0300
Subject: shader: Add logging

---
 src/shader_recompiler/backend/spirv/emit_spirv.cpp         | 8 ++++----
 src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp  | 6 +++---
 src/shader_recompiler/backend/spirv/emit_spirv_image.cpp   | 4 ++--
 src/shader_recompiler/backend/spirv/emit_spirv_special.cpp | 4 ++--
 4 files changed, 11 insertions(+), 11 deletions(-)

(limited to 'src/shader_recompiler/backend/spirv')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index cba420cdaa..14a99750dc 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -294,7 +294,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
                         Id main_func) {
     const Info& info{program.info};
     if (info.uses_fp32_denorms_flush && info.uses_fp32_denorms_preserve) {
-        // LOG_ERROR(HW_GPU, "Fp32 denorm flush and preserve on the same shader");
+        LOG_ERROR(Shader_SPIRV, "Fp32 denorm flush and preserve on the same shader");
     } else if (info.uses_fp32_denorms_flush) {
         if (profile.support_fp32_denorm_flush) {
             ctx.AddCapability(spv::Capability::DenormFlushToZero);
@@ -307,7 +307,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
             ctx.AddCapability(spv::Capability::DenormPreserve);
             ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 32U);
         } else {
-            // LOG_WARNING(HW_GPU, "Fp32 denorm preserve used in shader without host support");
+            LOG_WARNING(Shader_SPIRV, "Fp32 denorm preserve used in shader without host support");
         }
     }
     if (!profile.support_separate_denorm_behavior) {
@@ -315,7 +315,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
         return;
     }
     if (info.uses_fp16_denorms_flush && info.uses_fp16_denorms_preserve) {
-        // LOG_ERROR(HW_GPU, "Fp16 denorm flush and preserve on the same shader");
+        LOG_ERROR(Shader_SPIRV, "Fp16 denorm flush and preserve on the same shader");
     } else if (info.uses_fp16_denorms_flush) {
         if (profile.support_fp16_denorm_flush) {
             ctx.AddCapability(spv::Capability::DenormFlushToZero);
@@ -328,7 +328,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
             ctx.AddCapability(spv::Capability::DenormPreserve);
             ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 16U);
         } else {
-            // LOG_WARNING(HW_GPU, "Fp16 denorm preserve used in shader without host support");
+            LOG_WARNING(Shader_SPIRV, "Fp16 denorm preserve used in shader without host support");
         }
     }
 }
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
index 053800eb78..9af8bb9e18 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
@@ -73,7 +73,7 @@ Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value&
         const auto [scope, semantics]{AtomicArgs(ctx)};
         return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
     }
-    // LOG_WARNING(..., "Int64 Atomics not supported, fallback to non-atomic");
+    LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
     const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
                                     binding, offset, sizeof(u32[2]))};
     const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
@@ -140,7 +140,7 @@ Id EmitSharedAtomicExchange64(EmitContext& ctx, Id offset, Id value) {
         const auto [scope, semantics]{AtomicArgs(ctx)};
         return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
     }
-    // LOG_WARNING("Int64 Atomics not supported, fallback to non-atomic");
+    LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
     const Id pointer_1{SharedPointer(ctx, offset, 0)};
     const Id pointer_2{SharedPointer(ctx, offset, 1)};
     const Id value_1{ctx.OpLoad(ctx.U32[1], pointer_1)};
@@ -266,7 +266,7 @@ Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const
         const auto [scope, semantics]{AtomicArgs(ctx)};
         return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
     }
-    // LOG_WARNING(..., "Int64 Atomics not supported, fallback to non-atomic");
+    LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
     const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
                                     binding, offset, sizeof(u32[2]))};
     const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
index cf842e1e04..647804814e 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
@@ -39,7 +39,7 @@ public:
         }
         const std::array values{offset.InstRecursive(), offset2.InstRecursive()};
         if (!values[0]->AreAllArgsImmediates() || !values[1]->AreAllArgsImmediates()) {
-            // LOG_WARNING("Not all arguments in PTP are immediate, STUBBING");
+            LOG_WARNING(Shader_SPIRV, "Not all arguments in PTP are immediate, ignoring");
             return;
         }
         const IR::Opcode opcode{values[0]->GetOpcode()};
@@ -442,7 +442,7 @@ Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, I
 Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords) {
     const auto info{inst->Flags<IR::TextureInstInfo>()};
     if (info.image_format == ImageFormat::Typeless && !ctx.profile.support_typeless_image_loads) {
-        // LOG_WARNING(..., "Typeless image read not supported by host");
+        LOG_WARNING(Shader_SPIRV, "Typeless image read not supported by host");
         return ctx.ConstantNull(ctx.U32[4]);
     }
     return Emit(&EmitContext::OpImageSparseRead, &EmitContext::OpImageRead, ctx, inst, ctx.U32[4],
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
index 072a3b1bd5..9e7eb3cb18 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
@@ -131,7 +131,7 @@ void EmitEmitVertex(EmitContext& ctx, const IR::Value& stream) {
     if (stream.IsImmediate()) {
         ctx.OpEmitStreamVertex(ctx.Def(stream));
     } else {
-        // LOG_WARNING(..., "EmitVertex's stream is not constant");
+        LOG_WARNING(Shader_SPIRV, "Stream is not immediate");
         ctx.OpEmitStreamVertex(ctx.u32_zero_value);
     }
     // Restore fixed pipeline point size after emitting the vertex
@@ -142,7 +142,7 @@ void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream) {
     if (stream.IsImmediate()) {
         ctx.OpEndStreamPrimitive(ctx.Def(stream));
     } else {
-        // LOG_WARNING(..., "EndPrimitive's stream is not constant");
+        LOG_WARNING(Shader_SPIRV, "Stream is not immediate");
         ctx.OpEndStreamPrimitive(ctx.u32_zero_value);
     }
 }
-- 
cgit v1.2.3-70-g09d2