From 20390c0548d6eef2af67a363ee120a630267b741 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sun, 28 Feb 2021 23:33:53 -0500
Subject: shader: Implement IMNMX
---
.../backend/spirv/emit_spirv_integer.cpp | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
(limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index e49ca7bde0..5bdd943a4e 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -114,6 +114,22 @@ Id EmitBitwiseNot32(EmitContext& ctx, Id a) {
return ctx.OpNot(ctx.U32[1], a);
}
+Id EmitSMin32(EmitContext& ctx, Id a, Id b) {
+ return ctx.OpSMin(ctx.U32[1], a, b);
+}
+
+Id EmitUMin32(EmitContext& ctx, Id a, Id b) {
+ return ctx.OpUMin(ctx.U32[1], a, b);
+}
+
+Id EmitSMax32(EmitContext& ctx, Id a, Id b) {
+ return ctx.OpSMax(ctx.U32[1], a, b);
+}
+
+Id EmitUMax32(EmitContext& ctx, Id a, Id b) {
+ return ctx.OpUMax(ctx.U32[1], a, b);
+}
+
Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) {
return ctx.OpSLessThan(ctx.U1, lhs, rhs);
}
--
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