From ab463712474de5f99eec137a9c6233e55fe184f0 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Mon, 8 Mar 2021 18:31:53 -0300
Subject: shader: Initial support for textures and TEX
---
src/shader_recompiler/backend/spirv/emit_spirv.cpp | 12 ++++++++++++
1 file changed, 12 insertions(+)
(limited to 'src/shader_recompiler/backend/spirv/emit_spirv.cpp')
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index 8097fe82dc..a94e9cb2d2 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -221,6 +221,14 @@ std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, IR::Program
workgroup_size[2]);
SetupDenormControl(profile, program, ctx, func);
+ if (info.uses_sampled_1d) {
+ ctx.AddCapability(spv::Capability::Sampled1D);
+ }
+ if (info.uses_sparse_residency) {
+ ctx.AddCapability(spv::Capability::SparseResidency);
+ }
+ // TODO: Track this usage
+ ctx.AddCapability(spv::Capability::ImageGatherExtended);
return ctx.Assemble();
}
@@ -259,4 +267,8 @@ void EmitGetOverflowFromOp(EmitContext&) {
throw LogicError("Unreachable instruction");
}
+void EmitGetSparseFromOp(EmitContext&) {
+ throw LogicError("Unreachable instruction");
+}
+
} // namespace Shader::Backend::SPIRV
--
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