From eaff1030de07f3739794207403ea833ee91c0034 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Wed, 19 May 2021 21:58:32 -0400
Subject: glsl: Initial backend
---
src/shader_recompiler/backend/glsl/reg_alloc.h | 46 ++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 src/shader_recompiler/backend/glsl/reg_alloc.h
(limited to 'src/shader_recompiler/backend/glsl/reg_alloc.h')
diff --git a/src/shader_recompiler/backend/glsl/reg_alloc.h b/src/shader_recompiler/backend/glsl/reg_alloc.h
new file mode 100644
index 0000000000..850a93d6a8
--- /dev/null
+++ b/src/shader_recompiler/backend/glsl/reg_alloc.h
@@ -0,0 +1,46 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include <bitset>
+
+#include "common/common_types.h"
+
+namespace Shader::IR {
+class Inst;
+class Value;
+} // namespace Shader::IR
+
+namespace Shader::Backend::GLSL {
+
+struct Id {
+ u32 base_element : 2;
+ u32 num_elements_minus_one : 2;
+ u32 index : 26;
+ u32 is_spill : 1;
+ u32 is_condition_code : 1;
+};
+
+class RegAlloc {
+public:
+ std::string Define(IR::Inst& inst, u32 num_elements = 1, u32 alignment = 1);
+
+ std::string Consume(const IR::Value& value);
+
+private:
+ static constexpr size_t NUM_REGS = 4096;
+ static constexpr size_t NUM_ELEMENTS = 4;
+
+ std::string Consume(IR::Inst& inst);
+
+ Id Alloc(u32 num_elements, u32 alignment);
+
+ void Free(Id id);
+
+ size_t num_used_registers{};
+ std::bitset<NUM_REGS> register_use{};
+};
+
+} // namespace Shader::Backend::GLSL
--
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