From 9cc1b8a873196dac5a97368df125816b5b195777 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Tue, 25 May 2021 01:52:02 -0400
Subject: glsl: F16x2 storage atomics
---
src/shader_recompiler/backend/glsl/emit_context.cpp | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
(limited to 'src/shader_recompiler/backend/glsl/emit_context.cpp')
diff --git a/src/shader_recompiler/backend/glsl/emit_context.cpp b/src/shader_recompiler/backend/glsl/emit_context.cpp
index 7986bf78f3..a413219e3d 100644
--- a/src/shader_recompiler/backend/glsl/emit_context.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_context.cpp
@@ -39,6 +39,10 @@ void EmitContext::SetupExtensions(std::string& header) {
if (info.uses_atomic_f16x2_add || info.uses_atomic_f16x2_min || info.uses_atomic_f16x2_max) {
header += "#extension NV_shader_atomic_fp16_vector : enable\n";
}
+ if (info.uses_fp16) {
+ // TODO: AMD
+ header += "#extension GL_NV_gpu_shader5 : enable\n";
+ }
}
void EmitContext::DefineConstantBuffers() {
@@ -89,6 +93,18 @@ void EmitContext::DefineHelperFunctions() {
code += "uint CasFloatMax32x2(uint op_a,uint op_b){return "
"packHalf2x16(max(unpackHalf2x16(op_a),unpackHalf2x16(op_b)));}\n";
}
+ if (info.uses_atomic_f16x2_add) {
+ code += "uint CasFloatAdd16x2(uint op_a,uint op_b){return "
+ "packFloat2x16(unpackFloat2x16(op_a)+unpackFloat2x16(op_b));}\n";
+ }
+ if (info.uses_atomic_f16x2_min) {
+ code += "uint CasFloatMin16x2(uint op_a,uint op_b){return "
+ "packFloat2x16(min(unpackFloat2x16(op_a),unpackFloat2x16(op_b)));}\n";
+ }
+ if (info.uses_atomic_f16x2_max) {
+ code += "uint CasFloatMax16x2(uint op_a,uint op_b){return "
+ "packFloat2x16(max(unpackFloat2x16(op_a),unpackFloat2x16(op_b)));}\n";
+ }
// TODO: Track this usage
code += "uint CasMinS32(uint op_a,uint op_b){return uint(min(int(op_a),int(op_b)));}";
code += "uint CasMaxS32(uint op_a,uint op_b){return uint(max(int(op_a),int(op_b)));}";
--
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