using Ryujinx.Common.Memory; using Ryujinx.Memory; using System; using System.Buffers; using System.Runtime.CompilerServices; using System.Runtime.InteropServices; namespace Ryujinx.Graphics.Device { /// <summary> /// Device memory manager. /// </summary> public class DeviceMemoryManager : IWritableBlock { private const int PtLvl0Bits = 10; private const int PtLvl1Bits = 10; public const int PtPageBits = 12; private const ulong PtLvl0Size = 1UL << PtLvl0Bits; private const ulong PtLvl1Size = 1UL << PtLvl1Bits; public const ulong PageSize = 1UL << PtPageBits; private const ulong PtLvl0Mask = PtLvl0Size - 1; private const ulong PtLvl1Mask = PtLvl1Size - 1; public const ulong PageMask = PageSize - 1; private const int PtLvl0Bit = PtPageBits + PtLvl1Bits; private const int PtLvl1Bit = PtPageBits; private const int AddressSpaceBits = PtPageBits + PtLvl1Bits + PtLvl0Bits; public const ulong PteUnmapped = ulong.MaxValue; private readonly ulong[][] _pageTable; private readonly IVirtualMemoryManager _physical; /// <summary> /// Creates a new instance of the GPU memory manager. /// </summary> /// <param name="physicalMemory">Physical memory that this memory manager will map into</param> public DeviceMemoryManager(IVirtualMemoryManager physicalMemory) { _physical = physicalMemory; _pageTable = new ulong[PtLvl0Size][]; } /// <summary> /// Reads data from GPU mapped memory. /// </summary> /// <typeparam name="T">Type of the data</typeparam> /// <param name="va">GPU virtual address where the data is located</param> /// <returns>The data at the specified memory location</returns> public T Read<T>(ulong va) where T : unmanaged { int size = Unsafe.SizeOf<T>(); if (IsContiguous(va, size)) { return _physical.Read<T>(Translate(va)); } else { Span<byte> data = new byte[size]; ReadImpl(va, data); return MemoryMarshal.Cast<byte, T>(data)[0]; } } /// <summary> /// Gets a read-only span of data from GPU mapped memory. /// </summary> /// <param name="va">GPU virtual address where the data is located</param> /// <param name="size">Size of the data</param> /// <returns>The span of the data at the specified memory location</returns> public ReadOnlySpan<byte> GetSpan(ulong va, int size) { if (IsContiguous(va, size)) { return _physical.GetSpan(Translate(va), size); } else { Span<byte> data = new byte[size]; ReadImpl(va, data); return data; } } /// <summary> /// Reads data from a possibly non-contiguous region of GPU mapped memory. /// </summary> /// <param name="va">GPU virtual address of the data</param> /// <param name="data">Span to write the read data into</param> private void ReadImpl(ulong va, Span<byte> data) { if (data.Length == 0) { return; } int offset = 0, size; if ((va & PageMask) != 0) { ulong pa = Translate(va); size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask)); if (pa != PteUnmapped && _physical.IsMapped(pa)) { _physical.GetSpan(pa, size).CopyTo(data[..size]); } offset += size; } for (; offset < data.Length; offset += size) { ulong pa = Translate(va + (ulong)offset); size = Math.Min(data.Length - offset, (int)PageSize); if (pa != PteUnmapped && _physical.IsMapped(pa)) { _physical.GetSpan(pa, size).CopyTo(data.Slice(offset, size)); } } } /// <summary> /// Gets a writable region from GPU mapped memory. /// </summary> /// <param name="va">Start address of the range</param> /// <param name="size">Size in bytes to be range</param> /// <returns>A writable region with the data at the specified memory location</returns> public WritableRegion GetWritableRegion(ulong va, int size) { if (IsContiguous(va, size)) { return _physical.GetWritableRegion(Translate(va), size, tracked: true); } else { IMemoryOwner<byte> memoryOwner = ByteMemoryPool.Rent(size); GetSpan(va, size).CopyTo(memoryOwner.Memory.Span); return new WritableRegion(this, va, memoryOwner, tracked: true); } } /// <summary> /// Writes data to GPU mapped memory. /// </summary> /// <typeparam name="T">Type of the data</typeparam> /// <param name="va">GPU virtual address to write the value into</param> /// <param name="value">The value to be written</param> public void Write<T>(ulong va, T value) where T : unmanaged { Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1))); } /// <summary> /// Writes data to GPU mapped memory. /// </summary> /// <param name="va">GPU virtual address to write the data into</param> /// <param name="data">The data to be written</param> public void Write(ulong va, ReadOnlySpan<byte> data) { if (IsContiguous(va, data.Length)) { _physical.Write(Translate(va), data); } else { int offset = 0, size; if ((va & PageMask) != 0) { ulong pa = Translate(va); size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask)); if (pa != PteUnmapped && _physical.IsMapped(pa)) { _physical.Write(pa, data[..size]); } offset += size; } for (; offset < data.Length; offset += size) { ulong pa = Translate(va + (ulong)offset); size = Math.Min(data.Length - offset, (int)PageSize); if (pa != PteUnmapped && _physical.IsMapped(pa)) { _physical.Write(pa, data.Slice(offset, size)); } } } } /// <summary> /// Writes data to GPU mapped memory without write tracking. /// </summary> /// <param name="va">GPU virtual address to write the data into</param> /// <param name="data">The data to be written</param> public void WriteUntracked(ulong va, ReadOnlySpan<byte> data) { throw new NotSupportedException(); } /// <summary> /// Maps a given range of pages to the specified CPU virtual address. /// </summary> /// <remarks> /// All addresses and sizes must be page aligned. /// </remarks> /// <param name="pa">CPU virtual address to map into</param> /// <param name="va">GPU virtual address to be mapped</param> /// <param name="kind">Kind of the resource located at the mapping</param> public void Map(ulong pa, ulong va, ulong size) { lock (_pageTable) { for (ulong offset = 0; offset < size; offset += PageSize) { SetPte(va + offset, PackPte(pa + offset)); } } } /// <summary> /// Unmaps a given range of pages at the specified GPU virtual memory region. /// </summary> /// <param name="va">GPU virtual address to unmap</param> /// <param name="size">Size in bytes of the region being unmapped</param> public void Unmap(ulong va, ulong size) { lock (_pageTable) { for (ulong offset = 0; offset < size; offset += PageSize) { SetPte(va + offset, PteUnmapped); } } } /// <summary> /// Checks if a region of GPU mapped memory is contiguous. /// </summary> /// <param name="va">GPU virtual address of the region</param> /// <param name="size">Size of the region</param> /// <returns>True if the region is contiguous, false otherwise</returns> [MethodImpl(MethodImplOptions.AggressiveInlining)] private bool IsContiguous(ulong va, int size) { if (!ValidateAddress(va) || GetPte(va) == PteUnmapped) { return false; } ulong endVa = (va + (ulong)size + PageMask) & ~PageMask; va &= ~PageMask; int pages = (int)((endVa - va) / PageSize); for (int page = 0; page < pages - 1; page++) { if (!ValidateAddress(va + PageSize) || GetPte(va + PageSize) == PteUnmapped) { return false; } if (Translate(va) + PageSize != Translate(va + PageSize)) { return false; } va += PageSize; } return true; } /// <summary> /// Validates a GPU virtual address. /// </summary> /// <param name="va">Address to validate</param> /// <returns>True if the address is valid, false otherwise</returns> private static bool ValidateAddress(ulong va) { return va < (1UL << AddressSpaceBits); } /// <summary> /// Checks if a given page is mapped. /// </summary> /// <param name="va">GPU virtual address of the page to check</param> /// <returns>True if the page is mapped, false otherwise</returns> public bool IsMapped(ulong va) { return Translate(va) != PteUnmapped; } /// <summary> /// Translates a GPU virtual address to a CPU virtual address. /// </summary> /// <param name="va">GPU virtual address to be translated</param> /// <returns>CPU virtual address, or <see cref="PteUnmapped"/> if unmapped</returns> public ulong Translate(ulong va) { if (!ValidateAddress(va)) { return PteUnmapped; } ulong pte = GetPte(va); if (pte == PteUnmapped) { return PteUnmapped; } return UnpackPaFromPte(pte) + (va & PageMask); } /// <summary> /// Gets the Page Table entry for a given GPU virtual address. /// </summary> /// <param name="va">GPU virtual address</param> /// <returns>Page table entry (CPU virtual address)</returns> private ulong GetPte(ulong va) { ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask; ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask; if (_pageTable[l0] == null) { return PteUnmapped; } return _pageTable[l0][l1]; } /// <summary> /// Sets a Page Table entry at a given GPU virtual address. /// </summary> /// <param name="va">GPU virtual address</param> /// <param name="pte">Page table entry (CPU virtual address)</param> private void SetPte(ulong va, ulong pte) { ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask; ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask; if (_pageTable[l0] == null) { _pageTable[l0] = new ulong[PtLvl1Size]; for (ulong index = 0; index < PtLvl1Size; index++) { _pageTable[l0][index] = PteUnmapped; } } _pageTable[l0][l1] = pte; } /// <summary> /// Creates a page table entry from a physical address and kind. /// </summary> /// <param name="pa">Physical address</param> /// <returns>Page table entry</returns> private static ulong PackPte(ulong pa) { return pa; } /// <summary> /// Unpacks physical address from a page table entry. /// </summary> /// <param name="pte">Page table entry</param> /// <returns>Physical address</returns> private static ulong UnpackPaFromPte(ulong pte) { return pte; } } }