From 36b9ab0e48b6893c057a954e1ef3181b452add1c Mon Sep 17 00:00:00 2001 From: gdkchan <gab.dark.100@gmail.com> Date: Thu, 24 Jan 2019 23:59:53 -0200 Subject: Add ARM32 support on the translator (#561) * Remove ARM32 interpreter and add ARM32 support on the translator * Nits. * Rename Cond -> Condition * Align code again * Rename Data to Alu * Enable ARM32 support and handle undefined instructions * Use the IsThumb method to check if its a thumb opcode * Remove another 32-bits check --- Ryujinx.HLE/HOS/Kernel/Process/KProcess.cs | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Ryujinx.HLE/HOS/Kernel/Process/KProcess.cs') diff --git a/Ryujinx.HLE/HOS/Kernel/Process/KProcess.cs b/Ryujinx.HLE/HOS/Kernel/Process/KProcess.cs index 855f3a18..fd473014 100644 --- a/Ryujinx.HLE/HOS/Kernel/Process/KProcess.cs +++ b/Ryujinx.HLE/HOS/Kernel/Process/KProcess.cs @@ -3,6 +3,7 @@ using ChocolArm64.Events; using ChocolArm64.Memory; using Ryujinx.Common; using Ryujinx.Common.Logging; +using Ryujinx.HLE.Exceptions; using Ryujinx.HLE.HOS.Kernel.Common; using Ryujinx.HLE.HOS.Kernel.Memory; using Ryujinx.HLE.HOS.Kernel.SupervisorCall; @@ -797,6 +798,7 @@ namespace Ryujinx.HLE.HOS.Kernel.Process { context.ThreadState.Interrupt += InterruptHandler; context.ThreadState.SvcCall += _svcHandler.SvcCall; + context.ThreadState.Undefined += UndefinedInstructionHandler; } private void InterruptHandler(object sender, EventArgs e) @@ -1021,5 +1023,10 @@ namespace Ryujinx.HLE.HOS.Kernel.Process { Logger.PrintInfo(LogClass.Cpu, $"Executing at 0x{e.Position:X16}."); } + + private void UndefinedInstructionHandler(object sender, InstUndefinedEventArgs e) + { + throw new UndefinedInstructionException(e.Position, e.RawOpCode); + } } } \ No newline at end of file -- cgit v1.2.3-70-g09d2