From 0915731a9dfc4e2b9263d4b30c2876446ff2d9b3 Mon Sep 17 00:00:00 2001
From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
Date: Mon, 30 Dec 2019 02:22:47 +0100
Subject: Implemented fast paths for: (#846)
* opt
* Nit.
* opt_p2
* Nit.
---
ARMeilleure/CodeGen/X86/CodeGenerator.cs | 28 ++++++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
(limited to 'ARMeilleure/CodeGen/X86/CodeGenerator.cs')
diff --git a/ARMeilleure/CodeGen/X86/CodeGenerator.cs b/ARMeilleure/CodeGen/X86/CodeGenerator.cs
index d1224363..0268665c 100644
--- a/ARMeilleure/CodeGen/X86/CodeGenerator.cs
+++ b/ARMeilleure/CodeGen/X86/CodeGenerator.cs
@@ -269,11 +269,11 @@ namespace ARMeilleure.CodeGen.X86
{
if (dest.Type == OperandType.I32)
{
- context.Assembler.Movd(dest, source); // int _mm_cvtsi128_si32
+ context.Assembler.Movd(dest, source); // int _mm_cvtsi128_si32(__m128i a)
}
else /* if (dest.Type == OperandType.I64) */
{
- context.Assembler.Movq(dest, source); // __int64 _mm_cvtsi128_si64
+ context.Assembler.Movq(dest, source); // __int64 _mm_cvtsi128_si64(__m128i a)
}
}
else
@@ -305,6 +305,26 @@ namespace ARMeilleure.CodeGen.X86
break;
}
+ case IntrinsicType.BinaryGpr:
+ {
+ Operand dest = operation.Destination;
+ Operand src1 = operation.GetSource(0);
+ Operand src2 = operation.GetSource(1);
+
+ EnsureSameType(dest, src1);
+
+ if (!HardwareCapabilities.SupportsVexEncoding)
+ {
+ EnsureSameReg(dest, src1);
+ }
+
+ Debug.Assert(!dest.Type.IsInteger() && src2.Type.IsInteger());
+
+ context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src2.Type);
+
+ break;
+ }
+
case IntrinsicType.BinaryImm:
{
Operand dest = operation.Destination;
@@ -1070,11 +1090,11 @@ namespace ARMeilleure.CodeGen.X86
if (source.Type == OperandType.I32)
{
- context.Assembler.Movd(dest, source);
+ context.Assembler.Movd(dest, source); // (__m128i _mm_cvtsi32_si128(int a))
}
else /* if (source.Type == OperandType.I64) */
{
- context.Assembler.Movq(dest, source);
+ context.Assembler.Movq(dest, source); // (__m128i _mm_cvtsi64_si128(__int64 a))
}
}
--
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