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path: root/Ryujinx.Tests/Cpu/CpuTestSimd.cs
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2022-12-21Fix CPU FCVTN instruction implementation (slow path) (#4159)1.1.487gdkchan
2022-07-06Implement CPU FCVT Half <-> Double conversion variants (#3439)1.1.165gdkchan
2022-01-04CPU - Implement FCVTMS (Vector) (#2937)sharmander
2021-01-20CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests...LDj3SNuD
2020-11-18CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & F...LDj3SNuD
2020-07-13Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)LDj3SNuD
2020-05-27Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)LDj3SNuD
2020-03-24Add Fcvtas_S/V & Fcvtau_S/V. (#1018)LDj3SNuD
2019-12-29Implemented fast paths for: (#846)LDj3SNuD
2019-08-08Add a new JIT compiler for CPU code (#693)gdkchan
2019-07-08Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V...LDj3SNuD
2019-06-29Implement the remaining tests for Simd and Fp instructions of data processing...LDj3SNuD
2019-06-12Implement a custom value generator for the Tests of the CLS and CLZ instructi...LDj3SNuD
2019-05-30Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)LDj3SNuD
2019-05-29Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)LDj3SNuD
2019-04-26Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX...LDj3SNuD
2019-04-20Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instruction...LDj3SNuD
2019-04-12Sse optimized the Vector & Scalar fp-to-integer conversion instructions (unsi...LDj3SNuD
2019-04-03Sse optimized all the fp to integer conversion instructions (signed) with Tes...LDj3SNuD
2018-12-26Fix Frecpe_S/V and Frsqrte_S/V (full FP emu.). Add Sse Opt. & SoftFloat Impl....LDj3SNuD
2018-11-18Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V...LDj3SNuD
2018-11-01Add Flush-to-zero mode (input, output) to FP instructions (slow paths); updat...LDj3SNuD
2018-10-30Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)Alex Barney
2018-10-28Add SHA1C, SHA1H, SHA1M, SHA1P, SHA1SU0, SHA1SU1 and Isb instructions; add 6 ...LDj3SNuD
2018-10-23Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. ...LDj3SNuD
2018-10-13Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_...LDj3SNuD
2018-10-05Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)LDj3SNuD
2018-09-17Fix/Add 1+12 [Saturating] [Rounded] Shift Right Narrow (imm.) Instructions; a...LDj3SNuD
2018-09-08Remove old Tester, update Tests (some reworks). (#400)LDj3SNuD
2018-09-01Add Fcvtns_S, Fcvtns_V, Fcvtnu_S, Fcvtnu_V (AOpCodeSimd) FP & Umlal_V, Umlsl_...LDj3SNuD
2018-09-01Ryujinx.Tests: Add unicorn to test framework (#389)Merry
2018-08-27Add SHADD, SHSUB, UHSUB, SRHADD, URHADD, instructions; add 12 Tests. (#380)LDj3SNuD
2018-08-16Add SHA256H, SHA256H2, SHA256SU0, SHA256SU1 instructions; add 4 Tests (closed...LDj3SNuD
2018-08-13Add Sadalp_V, Saddlp_V, Uadalp_V, Uaddlp_V instructions; add 8 Tests. (#340)LDj3SNuD
2018-08-10Add Sqdmulh_S, Sqdmulh_V, Sqrdmulh_S, Sqrdmulh_V instructions; add 6 Tests. N...LDj3SNuD
2018-08-04Add SQADD, UQADD, SQSUB, UQSUB, SUQADD, USQADD, SQABS, SQNEG (Scalar, Vector)...LDj3SNuD
2018-07-18Implement Ssubw_V and Usubw_V instructions. (#287)LDj3SNuD
2018-07-15Fix EmitHighNarrow(), EmitSaturatingNarrowOp() when Rd == Rn || Rd == Rm (& P...LDj3SNuD
2018-07-03Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Impr...LDj3SNuD
2018-06-30Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, Uabdl_V...LDj3SNuD
2018-06-25Add Sqxtun_S, Sqxtun_V with 3 tests. (#188)LDj3SNuD
2018-06-25Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32c...LDj3SNuD
2018-06-18Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmts...LDj3SNuD
2018-05-11Add intrinsics support (#121)gdkchan
2018-04-29Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110)LDj3SNuD
2018-04-25Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_...LDj3SNuD
2018-04-21Fix Addp_S in AOpCodeTable. Add 5 Tests: ADDP (scalar), ADDP (vector), ADDV. ...LDj3SNuD
2018-04-20Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tes...LDj3SNuD