diff options
Diffstat (limited to 'src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs')
| -rw-r--r-- | src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs b/src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs index d241aac4..f8fb013d 100644 --- a/src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs +++ b/src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs @@ -9,7 +9,7 @@ namespace Ryujinx.Tests.Cpu { #if AluRs32 -#region "ValueSource (Opcodes)" + #region "ValueSource (Opcodes)" private static uint[] _Add_Adds_Rsb_Rsbs_() { return new[] @@ -17,7 +17,7 @@ namespace Ryujinx.Tests.Cpu 0xe0800000u, // ADD R0, R0, R0, LSL #0 0xe0900000u, // ADDS R0, R0, R0, LSL #0 0xe0600000u, // RSB R0, R0, R0, LSL #0 - 0xe0700000u // RSBS R0, R0, R0, LSL #0 + 0xe0700000u, // RSBS R0, R0, R0, LSL #0 }; } @@ -30,14 +30,14 @@ namespace Ryujinx.Tests.Cpu 0xe0e00000u, // RSC R0, R0, R0 0xe0f00000u, // RSCS R0, R0, R0 0xe0c00000u, // SBC R0, R0, R0 - 0xe0d00000u // SBCS R0, R0, R0 + 0xe0d00000u, // SBCS R0, R0, R0 }; } -#endregion + #endregion [Test, Pairwise] - public void Adc_Adcs_Rsc_Rscs_Sbc_Sbcs([ValueSource("_Adc_Adcs_Rsc_Rscs_Sbc_Sbcs_")] uint opcode, + public void Adc_Adcs_Rsc_Rscs_Sbc_Sbcs([ValueSource(nameof(_Adc_Adcs_Rsc_Rscs_Sbc_Sbcs_))] uint opcode, [Values(0u, 13u)] uint rd, [Values(1u, 13u)] uint rn, [Values(2u, 13u)] uint rm, @@ -57,7 +57,7 @@ namespace Ryujinx.Tests.Cpu } [Test, Pairwise] - public void Add_Adds_Rsb_Rsbs([ValueSource("_Add_Adds_Rsb_Rsbs_")] uint opcode, + public void Add_Adds_Rsb_Rsbs([ValueSource(nameof(_Add_Adds_Rsb_Rsbs_))] uint opcode, [Values(0u, 13u)] uint rd, [Values(1u, 13u)] uint rn, [Values(2u, 13u)] uint rm, @@ -79,4 +79,4 @@ namespace Ryujinx.Tests.Cpu } #endif } -}
\ No newline at end of file +} |