aboutsummaryrefslogtreecommitdiff
path: root/src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs
diff options
context:
space:
mode:
Diffstat (limited to 'src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs')
-rw-r--r--src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs b/src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs
index 95f18054..cefb50e4 100644
--- a/src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs
+++ b/src/ARMeilleure/Decoders/OpCodeT16AddSubImm3.cs
@@ -1,6 +1,6 @@
namespace ARMeilleure.Decoders
{
- class OpCodeT16AddSubImm3: OpCodeT16, IOpCode32AluImm
+ class OpCodeT16AddSubImm3 : OpCodeT16, IOpCode32AluImm
{
public int Rd { get; }
public int Rn { get; }
@@ -15,8 +15,8 @@
public OpCodeT16AddSubImm3(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
- Rd = (opCode >> 0) & 0x7;
- Rn = (opCode >> 3) & 0x7;
+ Rd = (opCode >> 0) & 0x7;
+ Rn = (opCode >> 3) & 0x7;
Immediate = (opCode >> 6) & 0x7;
IsRotated = false;
}