aboutsummaryrefslogtreecommitdiff
path: root/src/ARMeilleure/Decoders/OpCodeSimd.cs
diff options
context:
space:
mode:
Diffstat (limited to 'src/ARMeilleure/Decoders/OpCodeSimd.cs')
-rw-r--r--src/ARMeilleure/Decoders/OpCodeSimd.cs14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/ARMeilleure/Decoders/OpCodeSimd.cs b/src/ARMeilleure/Decoders/OpCodeSimd.cs
index 85713690..bd34d74d 100644
--- a/src/ARMeilleure/Decoders/OpCodeSimd.cs
+++ b/src/ARMeilleure/Decoders/OpCodeSimd.cs
@@ -2,18 +2,18 @@ namespace ARMeilleure.Decoders
{
class OpCodeSimd : OpCode, IOpCodeSimd
{
- public int Rd { get; }
- public int Rn { get; }
- public int Opc { get; }
+ public int Rd { get; }
+ public int Rn { get; }
+ public int Opc { get; }
public int Size { get; protected set; }
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeSimd(inst, address, opCode);
public OpCodeSimd(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
- Rd = (opCode >> 0) & 0x1f;
- Rn = (opCode >> 5) & 0x1f;
- Opc = (opCode >> 15) & 0x3;
+ Rd = (opCode >> 0) & 0x1f;
+ Rn = (opCode >> 5) & 0x1f;
+ Opc = (opCode >> 15) & 0x3;
Size = (opCode >> 22) & 0x3;
RegisterSize = ((opCode >> 30) & 1) != 0
@@ -21,4 +21,4 @@ namespace ARMeilleure.Decoders
: RegisterSize.Simd64;
}
}
-} \ No newline at end of file
+}