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Diffstat (limited to 'src/ARMeilleure/Decoders/OpCode32SimdRegElemLong.cs')
-rw-r--r--src/ARMeilleure/Decoders/OpCode32SimdRegElemLong.cs22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/ARMeilleure/Decoders/OpCode32SimdRegElemLong.cs b/src/ARMeilleure/Decoders/OpCode32SimdRegElemLong.cs
new file mode 100644
index 00000000..b87ac413
--- /dev/null
+++ b/src/ARMeilleure/Decoders/OpCode32SimdRegElemLong.cs
@@ -0,0 +1,22 @@
+namespace ARMeilleure.Decoders
+{
+ class OpCode32SimdRegElemLong : OpCode32SimdRegElem
+ {
+ public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdRegElemLong(inst, address, opCode, false);
+ public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdRegElemLong(inst, address, opCode, true);
+
+ public OpCode32SimdRegElemLong(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
+ {
+ Q = false;
+ F = false;
+
+ RegisterSize = RegisterSize.Simd64;
+
+ // (Vd & 1) != 0 || Size == 3 are also invalid, but they are checked on encoding.
+ if (Size == 0)
+ {
+ Instruction = InstDescriptor.Undefined;
+ }
+ }
+ }
+}