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Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimdLogical32.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTestSimdLogical32.cs36
1 files changed, 17 insertions, 19 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdLogical32.cs b/Ryujinx.Tests/Cpu/CpuTestSimdLogical32.cs
index e55574ff..2cc1a094 100644
--- a/Ryujinx.Tests/Cpu/CpuTestSimdLogical32.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestSimdLogical32.cs
@@ -13,17 +13,17 @@ namespace Ryujinx.Tests.Cpu
#region "ValueSource (Types)"
private static ulong[] _8B4H2S_()
{
- return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
- 0x8080808080808080ul, 0x7FFF7FFF7FFF7FFFul,
- 0x8000800080008000ul, 0x7FFFFFFF7FFFFFFFul,
- 0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul };
+ return new[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
+ 0x8080808080808080ul, 0x7FFF7FFF7FFF7FFFul,
+ 0x8000800080008000ul, 0x7FFFFFFF7FFFFFFFul,
+ 0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul };
}
#endregion
#region "ValueSource (Opcodes)"
private static uint[] _Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I_()
{
- return new uint[]
+ return new[]
{
0xf2100110u, // VBIC D0, D0, D0
0xf3300110u, // VBIF D0, D0, D0
@@ -38,7 +38,7 @@ namespace Ryujinx.Tests.Cpu
private static uint[] _Vbic_Vorr_II_()
{
- return new uint[]
+ return new[]
{
0xf2800130u, // VBIC.I32 D0, #0 (A1)
0xf2800930u, // VBIC.I16 D0, #0 (A2)
@@ -48,16 +48,14 @@ namespace Ryujinx.Tests.Cpu
}
#endregion
- private const int RndCnt = 2;
-
[Test, Pairwise]
- public void Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I([ValueSource("_Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I_")] uint opcode,
+ public void Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I([ValueSource(nameof(_Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I_))] uint opcode,
[Range(0u, 5u)] uint rd,
[Range(0u, 5u)] uint rn,
[Range(0u, 5u)] uint rm,
- [Values(ulong.MinValue, ulong.MaxValue)] [Random(RndCnt)] ulong z,
- [Values(ulong.MinValue, ulong.MaxValue)] [Random(RndCnt)] ulong a,
- [Values(ulong.MinValue, ulong.MaxValue)] [Random(RndCnt)] ulong b,
+ [Values(ulong.MinValue, ulong.MaxValue)] ulong z,
+ [Values(ulong.MinValue, ulong.MaxValue)] ulong a,
+ [Values(ulong.MinValue, ulong.MaxValue)] ulong b,
[Values] bool q)
{
if (q)
@@ -83,10 +81,10 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Pairwise]
- public void Vbic_Vorr_II([ValueSource("_Vbic_Vorr_II_")] uint opcode,
+ public void Vbic_Vorr_II([ValueSource(nameof(_Vbic_Vorr_II_))] uint opcode,
[Values(0u, 1u)] uint rd,
- [Values(ulong.MinValue, ulong.MaxValue)] [Random(RndCnt)] ulong z,
- [Values(byte.MinValue, byte.MaxValue)] [Random(RndCnt)] byte imm,
+ [Values(ulong.MinValue, ulong.MaxValue)] ulong z,
+ [Values(byte.MinValue, byte.MaxValue)] byte imm,
[Values(0u, 1u, 2u, 3u)] uint cMode,
[Values] bool q)
{
@@ -119,9 +117,9 @@ namespace Ryujinx.Tests.Cpu
public void Vtst([Range(0u, 5u)] uint rd,
[Range(0u, 5u)] uint rn,
[Range(0u, 5u)] uint rm,
- [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
- [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
- [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong b,
+ [ValueSource(nameof(_8B4H2S_))] ulong z,
+ [ValueSource(nameof(_8B4H2S_))] ulong a,
+ [ValueSource(nameof(_8B4H2S_))] ulong b,
[Values(0u, 1u, 2u)] uint size,
[Values] bool q)
{
@@ -152,4 +150,4 @@ namespace Ryujinx.Tests.Cpu
}
#endif
}
-}
+} \ No newline at end of file