diff options
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestMul32.cs')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestMul32.cs | 32 |
1 files changed, 15 insertions, 17 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestMul32.cs b/Ryujinx.Tests/Cpu/CpuTestMul32.cs index daa6d460..0743e913 100644 --- a/Ryujinx.Tests/Cpu/CpuTestMul32.cs +++ b/Ryujinx.Tests/Cpu/CpuTestMul32.cs @@ -12,7 +12,7 @@ namespace Ryujinx.Tests.Cpu #region "ValueSource (Opcodes)" private static uint[] _Smlabb_Smlabt_Smlatb_Smlatt_() { - return new uint[] + return new[] { 0xe1000080u, // SMLABB R0, R0, R0, R0 0xe10000C0u, // SMLABT R0, R0, R0, R0 @@ -23,7 +23,7 @@ namespace Ryujinx.Tests.Cpu private static uint[] _Smlawb_Smlawt_() { - return new uint[] + return new[] { 0xe1200080u, // SMLAWB R0, R0, R0, R0 0xe12000C0u, // SMLAWT R0, R0, R0, R0 @@ -32,7 +32,7 @@ namespace Ryujinx.Tests.Cpu private static uint[] _Smulbb_Smulbt_Smultb_Smultt_() { - return new uint[] + return new[] { 0xe1600080u, // SMULBB R0, R0, R0 0xe16000C0u, // SMULBT R0, R0, R0 @@ -43,7 +43,7 @@ namespace Ryujinx.Tests.Cpu private static uint[] _Smulwb_Smulwt_() { - return new uint[] + return new[] { 0xe12000a0u, // SMULWB R0, R0, R0 0xe12000e0u, // SMULWT R0, R0, R0 @@ -51,8 +51,6 @@ namespace Ryujinx.Tests.Cpu } #endregion - private const int RndCnt = 2; - [Test, Pairwise, Description("SMLA<x><y> <Rd>, <Rn>, <Rm>, <Ra>")] public void Smla___32bit([ValueSource("_Smlabb_Smlabt_Smlatb_Smlatt_")] uint opcode, [Values(0u, 0xdu)] uint rn, @@ -60,11 +58,11 @@ namespace Ryujinx.Tests.Cpu [Values(2u, 0xdu)] uint ra, [Values(3u, 0xdu)] uint rd, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + 0x80000000u, 0xFFFFFFFFu)] uint wn, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm, + 0x80000000u, 0xFFFFFFFFu)] uint wm, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wa) + 0x80000000u, 0xFFFFFFFFu)] uint wa) { opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16); @@ -82,11 +80,11 @@ namespace Ryujinx.Tests.Cpu [Values(2u, 0xdu)] uint ra, [Values(3u, 0xdu)] uint rd, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + 0x80000000u, 0xFFFFFFFFu)] uint wn, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm, + 0x80000000u, 0xFFFFFFFFu)] uint wm, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wa) + 0x80000000u, 0xFFFFFFFFu)] uint wa) { opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16); @@ -103,9 +101,9 @@ namespace Ryujinx.Tests.Cpu [Values(1u, 0xdu)] uint rm, [Values(2u, 0xdu)] uint rd, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + 0x80000000u, 0xFFFFFFFFu)] uint wn, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm) + 0x80000000u, 0xFFFFFFFFu)] uint wm) { opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16); @@ -122,9 +120,9 @@ namespace Ryujinx.Tests.Cpu [Values(1u, 0xdu)] uint rm, [Values(2u, 0xdu)] uint rd, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + 0x80000000u, 0xFFFFFFFFu)] uint wn, [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm) + 0x80000000u, 0xFFFFFFFFu)] uint wm) { opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16); @@ -136,4 +134,4 @@ namespace Ryujinx.Tests.Cpu } #endif } -} +}
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