1 files changed, 79 insertions, 0 deletions
diff --git a/ARMeilleure/IntermediateRepresentation/Instruction.cs b/ARMeilleure/IntermediateRepresentation/Instruction.cs
new file mode 100644
index 00000000..4c4ecb8f
--- /dev/null
+++ b/ARMeilleure/IntermediateRepresentation/Instruction.cs
@@ -0,0 +1,79 @@
+namespace ARMeilleure.IntermediateRepresentation
+{
+    enum Instruction
+    {
+        Add,
+        BitwiseAnd,
+        BitwiseExclusiveOr,
+        BitwiseNot,
+        BitwiseOr,
+        Branch,
+        BranchIfFalse,
+        BranchIfTrue,
+        ByteSwap,
+        Call,
+        CompareAndSwap128,
+        CompareEqual,
+        CompareGreater,
+        CompareGreaterOrEqual,
+        CompareGreaterOrEqualUI,
+        CompareGreaterUI,
+        CompareLess,
+        CompareLessOrEqual,
+        CompareLessOrEqualUI,
+        CompareLessUI,
+        CompareNotEqual,
+        ConditionalSelect,
+        ConvertI64ToI32,
+        ConvertToFP,
+        ConvertToFPUI,
+        Copy,
+        CountLeadingZeros,
+        Divide,
+        DivideUI,
+        Load,
+        Load16,
+        Load8,
+        LoadArgument,
+        Multiply,
+        Multiply64HighSI,
+        Multiply64HighUI,
+        Negate,
+        Return,
+        RotateRight,
+        ShiftLeft,
+        ShiftRightSI,
+        ShiftRightUI,
+        SignExtend16,
+        SignExtend32,
+        SignExtend8,
+        StackAlloc,
+        Store,
+        Store16,
+        Store8,
+        Subtract,
+        VectorCreateScalar,
+        VectorExtract,
+        VectorExtract16,
+        VectorExtract8,
+        VectorInsert,
+        VectorInsert16,
+        VectorInsert8,
+        VectorOne,
+        VectorZero,
+        VectorZeroUpper64,
+        VectorZeroUpper96,
+        ZeroExtend16,
+        ZeroExtend32,
+        ZeroExtend8,
+
+        Clobber,
+        CpuId,
+        Extended,
+        Fill,
+        LoadFromContext,
+        Spill,
+        SpillArg,
+        StoreToContext
+    }
+}
+\ No newline at end of file