diff options
Diffstat (limited to 'ARMeilleure/CodeGen/X86/CodeGenerator.cs')
| -rw-r--r-- | ARMeilleure/CodeGen/X86/CodeGenerator.cs | 43 |
1 files changed, 23 insertions, 20 deletions
diff --git a/ARMeilleure/CodeGen/X86/CodeGenerator.cs b/ARMeilleure/CodeGen/X86/CodeGenerator.cs index 1d0a4c12..1bcab736 100644 --- a/ARMeilleure/CodeGen/X86/CodeGenerator.cs +++ b/ARMeilleure/CodeGen/X86/CodeGenerator.cs @@ -9,6 +9,9 @@ using System; using System.Collections.Generic; using System.Diagnostics; using System.IO; +using System.Numerics; + +using static ARMeilleure.IntermediateRepresentation.OperandHelper; namespace ARMeilleure.CodeGen.X86 { @@ -550,7 +553,7 @@ namespace ARMeilleure.CodeGen.X86 if (operation.SourcesCount == 5) // CompareAndSwap128 has 5 sources, compared to CompareAndSwap64/32's 3. { - MemoryOperand memOp = new MemoryOperand(OperandType.I64, src1); + MemoryOperand memOp = MemoryOp(OperandType.I64, src1); context.Assembler.Cmpxchg16b(memOp); } @@ -561,7 +564,7 @@ namespace ARMeilleure.CodeGen.X86 EnsureSameType(src2, src3); - MemoryOperand memOp = new MemoryOperand(src3.Type, src1); + MemoryOperand memOp = MemoryOp(src3.Type, src1); context.Assembler.Cmpxchg(memOp, src3); } @@ -751,7 +754,7 @@ namespace ARMeilleure.CodeGen.X86 // operand size constant to the destination register. context.JumpToNear(X86Condition.NotEqual); - context.Assembler.Mov(dest, new Operand(operandSize | operandMask), OperandType.I32); + context.Assembler.Mov(dest, Const(operandSize | operandMask), OperandType.I32); context.JumpHere(); @@ -759,7 +762,7 @@ namespace ARMeilleure.CodeGen.X86 // starting from the least significant bit. However we are supposed to // return the number of 0 bits on the high end. So, we invert the result // of the BSR using XOR to get the correct value. - context.Assembler.Xor(dest, new Operand(operandMask), OperandType.I32); + context.Assembler.Xor(dest, Const(operandMask), OperandType.I32); } private static void GenerateCpuId(CodeGenContext context, Operation operation) @@ -828,7 +831,7 @@ namespace ARMeilleure.CodeGen.X86 Operand rsp = Register(X86Register.Rsp); - MemoryOperand memOp = new MemoryOperand(dest.Type, rsp, null, Multiplier.x1, offs); + MemoryOperand memOp = MemoryOp(dest.Type, rsp, null, Multiplier.x1, offs); GenerateLoad(context, memOp, dest); } @@ -1027,7 +1030,7 @@ namespace ARMeilleure.CodeGen.X86 Operand rsp = Register(X86Register.Rsp); - MemoryOperand memOp = new MemoryOperand(source.Type, rsp, null, Multiplier.x1, offs); + MemoryOperand memOp = MemoryOp(source.Type, rsp, null, Multiplier.x1, offs); GenerateStore(context, memOp, source); } @@ -1043,7 +1046,7 @@ namespace ARMeilleure.CodeGen.X86 Operand rsp = Register(X86Register.Rsp); - MemoryOperand memOp = new MemoryOperand(OperandType.I64, rsp, null, Multiplier.x1, offs); + MemoryOperand memOp = MemoryOp(OperandType.I64, rsp, null, Multiplier.x1, offs); context.Assembler.Lea(dest, memOp, OperandType.I64); } @@ -1247,7 +1250,7 @@ namespace ARMeilleure.CodeGen.X86 if ((index & 1) != 0) { - context.Assembler.Shr(dest, new Operand(8), OperandType.I32); + context.Assembler.Shr(dest, Const(8), OperandType.I32); } else { @@ -1286,7 +1289,7 @@ namespace ARMeilleure.CodeGen.X86 context.Assembler.Pinsrw(dest, dest, src2, (byte)(index * words + word)); // Move next word down. - context.Assembler.Ror(src2, new Operand(16), src2.Type); + context.Assembler.Ror(src2, Const(16), src2.Type); } } @@ -1594,7 +1597,7 @@ namespace ARMeilleure.CodeGen.X86 while (mask != 0) { - int bit = BitUtils.LowestBitSet(mask); + int bit = BitOperations.TrailingZeroCount(mask); context.Assembler.Push(Register((X86Register)bit)); @@ -1614,7 +1617,7 @@ namespace ARMeilleure.CodeGen.X86 if (reservedStackSize != 0) { - context.Assembler.Sub(rsp, new Operand(reservedStackSize), OperandType.I64); + context.Assembler.Sub(rsp, Const(reservedStackSize), OperandType.I64); } int offset = reservedStackSize; @@ -1623,11 +1626,11 @@ namespace ARMeilleure.CodeGen.X86 while (mask != 0) { - int bit = BitUtils.LowestBitSet(mask); + int bit = BitOperations.TrailingZeroCount(mask); offset -= 16; - MemoryOperand memOp = new MemoryOperand(OperandType.V128, rsp, null, Multiplier.x1, offset); + MemoryOperand memOp = MemoryOp(OperandType.V128, rsp, null, Multiplier.x1, offset); context.Assembler.Movdqu(memOp, Xmm((X86Register)bit)); @@ -1653,11 +1656,11 @@ namespace ARMeilleure.CodeGen.X86 while (mask != 0) { - int bit = BitUtils.LowestBitSet(mask); + int bit = BitOperations.TrailingZeroCount(mask); offset -= 16; - MemoryOperand memOp = new MemoryOperand(OperandType.V128, rsp, null, Multiplier.x1, offset); + MemoryOperand memOp = MemoryOp(OperandType.V128, rsp, null, Multiplier.x1, offset); context.Assembler.Movdqu(Xmm((X86Register)bit), memOp); @@ -1666,7 +1669,7 @@ namespace ARMeilleure.CodeGen.X86 if (reservedStackSize != 0) { - context.Assembler.Add(rsp, new Operand(reservedStackSize), OperandType.I64); + context.Assembler.Add(rsp, Const(reservedStackSize), OperandType.I64); } mask = CallingConvention.GetIntCalleeSavedRegisters() & context.AllocResult.IntUsedRegisters; @@ -1698,7 +1701,7 @@ namespace ARMeilleure.CodeGen.X86 for (int offset = PageSize; offset < size; offset += PageSize) { - Operand memOp = new MemoryOperand(OperandType.I32, rsp, null, Multiplier.x1, -offset); + Operand memOp = MemoryOp(OperandType.I32, rsp, null, Multiplier.x1, -offset); context.Assembler.Mov(temp, memOp, OperandType.I32); } @@ -1711,17 +1714,17 @@ namespace ARMeilleure.CodeGen.X86 return operand as MemoryOperand; } - return new MemoryOperand(type, operand); + return MemoryOp(type, operand); } private static Operand Register(X86Register register, OperandType type = OperandType.I64) { - return new Operand((int)register, RegisterType.Integer, type); + return OperandHelper.Register((int)register, RegisterType.Integer, type); } private static Operand Xmm(X86Register register) { - return new Operand((int)register, RegisterType.Vector, OperandType.V128); + return OperandHelper.Register((int)register, RegisterType.Vector, OperandType.V128); } } }
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