Compute = 0xb1c0,

InlineToMemory = 0xa140,

Dma = 0xb0b5,

}

/// </summary>

public const ulong MaxUnknownStorageSize = 0x100000;

}

using Ryujinx.Graphics.Device;

using Ryujinx.Graphics.Gpu.Engine.InlineToMemory;

using Ryujinx.Graphics.Gpu.Engine.Threed;

using Ryujinx.Graphics.Gpu.Engine.Types;

using Ryujinx.Graphics.Gpu.Shader;

using Ryujinx.Graphics.Shader;

using System;

{

{ nameof(ComputeClassState.LaunchDma), new RwCallback(LaunchDma, null) },

{ nameof(ComputeClassState.LoadInlineData), new RwCallback(LoadInlineData, null) },

});

_i2mClass = new InlineToMemoryClass(context, channel, initializeState: false);

ulong samplerPoolGpuVa = ((ulong)_state.State.SetTexSamplerPoolAOffsetUpper << 32) | _state.State.SetTexSamplerPoolB;

ulong texturePoolGpuVa = ((ulong)_state.State.SetTexHeaderPoolAOffsetUpper << 32) | _state.State.SetTexHeaderPoolB;

texturePoolGpuVa,

_state.State.SetTexHeaderPoolCMaximumIndex,

_state.State.SetBindlessTextureConstantBufferSlotSelect);

qmd.CtaThreadDimension0,

qmd.CtaThreadDimension1,

qmd.CtaThreadDimension2,

cs = memoryManager.Physical.ShaderCache.GetComputeShader(_channel, poolState, computeState, shaderGpuVa);

_context.Renderer.Pipeline.SetProgram(cs.HostProgram);

}

_channel.BufferManager.SetComputeBufferBindings(cs.Bindings);

/// </summary>

unsafe struct ComputeClassState

{

public uint SetObject;

public fixed uint Reserved04[63];

public uint NoOperation;

public uint SetNotifyA;

public uint SetNotifyB;

public uint Notify;

public uint WaitForIdle;

public fixed uint Reserved114[7];

public uint SetGlobalRenderEnableA;

public uint SetGlobalRenderEnableB;

public uint SetGlobalRenderEnableC;

public uint SendGoIdle;

public uint PmTrigger;

public uint PmTriggerWfi;

public uint LineLengthIn;

public uint LineCount;

public uint OffsetOutUpper;

public uint OffsetOut;

public uint PitchOut;

public uint SetDstBlockSize;

public uint SetDstWidth;

public uint SetDstHeight;

public uint SetDstDepth;

public uint SetDstLayer;

public uint SetDstOriginBytesX;

public uint SetDstOriginSamplesY;

public uint LaunchDma;

public uint LoadInlineData;

public fixed uint Reserved1B8[9];

public uint SetI2mSemaphoreA;

public uint SetI2mSemaphoreB;

public uint SetI2mSemaphoreC;

public fixed uint Reserved1E8[2];

public uint SetI2mSpareNoop02;

public uint SetI2mSpareNoop03;

public uint SetValidSpanOverflowAreaA;

public uint SetValidSpanOverflowAreaB;

public uint SetValidSpanOverflowAreaC;

public uint SetCoalesceWaitingPeriodUnit;

public uint PerfmonTransfer;

public uint SetShaderSharedMemoryWindow;

public uint SetSelectMaxwellTextureHeaders;

public uint InvalidateShaderCaches;

public uint SetReservedSwMethod00;

public uint SetReservedSwMethod01;

public uint SetReservedSwMethod02;

public uint SetReservedSwMethod06;

public uint SetReservedSwMethod07;

public uint SetCwdControl;

public uint InvalidateTextureHeaderCacheNoWfi;

public uint SetCwdRefCounter;

public uint SetReservedSwMethod08;

public uint SetReservedSwMethod09;

public uint SetReservedSwMethod10;

public uint SetReservedSwMethod14;

public uint SetReservedSwMethod15;

public uint SetGwcScgType;

public uint SetScgControl;

public uint InvalidateConstantBufferCacheA;

public uint InvalidateConstantBufferCacheB;

public uint InvalidateConstantBufferCacheC;

public uint SetComputeClassVersion;

public uint CheckComputeClassVersion;

public uint SetQmdVersion;

public uint SetWfiConfig;

public uint CheckQmdVersion;

public uint WaitForIdleScgType;

public uint InvalidateSkedCaches;

public uint SetScgRenderEnableControl;

public fixed uint Reserved2A0[4];

public uint SetCwdSlotCount;

public uint SendPcasA;

public uint SendPcasB;

public uint SendSignalingPcasB;

public fixed uint Reserved2C0[9];

public uint SetShaderLocalMemoryNonThrottledA;

public uint SetShaderLocalMemoryNonThrottledB;

public uint SetShaderLocalMemoryNonThrottledC;

public uint SetShaderLocalMemoryThrottledA;

public uint SetShaderLocalMemoryThrottledB;

public uint SetShaderLocalMemoryThrottledC;

public fixed uint Reserved2FC[5];

public uint SetSpaVersion;

public fixed uint Reserved314[123];

public uint SetFalcon00;

public uint SetFalcon01;

public uint SetShaderLocalMemoryWindow;

public fixed uint Reserved780[4];

public uint SetShaderLocalMemoryA;

public uint SetShaderLocalMemoryB;

public fixed uint Reserved798[383];

public uint SetShaderCacheControl;

public fixed uint ReservedD98[19];

public uint SetSmTimeoutInterval;

public fixed uint ReservedDE8[87];

public uint SetSpareNoop12;

public uint SetSpareNoop13;

public uint SetSpareNoop11;

public fixed uint Reserved1070[103];

public uint InvalidateSamplerCacheAll;

public uint InvalidateTextureHeaderCacheAll;

public fixed uint Reserved1214[29];

public uint InvalidateTextureDataCacheNoWfi;

public fixed uint Reserved128C[7];

public uint ActivatePerfSettingsForComputeContext;

public fixed uint Reserved12AC[33];

public uint InvalidateSamplerCache;

public uint InvalidateTextureHeaderCache;

public uint InvalidateTextureDataCache;

public fixed uint Reserved133C[58];

public uint InvalidateSamplerCacheNoWfi;

public fixed uint Reserved1428[64];

public uint SetShaderExceptions;

public fixed uint Reserved152C[9];

public uint SetRenderEnableA;

public uint SetRenderEnableB;

public uint SetRenderEnableC;

public uint SetTexSamplerPoolA;

public uint SetTexSamplerPoolB;

public uint SetTexSamplerPoolC;

public fixed uint Reserved1568[3];

public uint SetTexHeaderPoolA;

public uint SetTexHeaderPoolB;

public uint SetTexHeaderPoolC;

public fixed uint Reserved1580[34];

public uint SetProgramRegionA;

public uint SetProgramRegionB;

public fixed uint Reserved1610[34];

public uint InvalidateShaderCachesNoWfi;

public fixed uint Reserved169C[170];

public uint SetRenderEnableOverride;

public fixed uint Reserved1948[57];

public uint PipeNop;

public uint SetSpare00;

public uint SetSpare03;

public fixed uint Reserved1A40[48];

public uint SetReportSemaphoreA;

public uint SetReportSemaphoreB;

public uint SetReportSemaphoreC;

public uint SetReportSemaphoreD;

public fixed uint Reserved1B10[702];

public uint SetBindlessTexture;

public uint SetTrapHandler;

public fixed uint Reserved2610[843];

public Array8<uint> SetShaderPerformanceCounterValueUpper;

public bool SetShaderPerformanceCounterControlBWindowed(int i) => (SetShaderPerformanceCounterControlB[i] & 0x8) != 0;

public int SetShaderPerformanceCounterControlBFunc(int i) => (int)((SetShaderPerformanceCounterControlB[i] >> 4) & 0xFFFF);

public uint SetShaderPerformanceCounterTrapControl;

public uint StartShaderPerformanceCounter;

public uint StopShaderPerformanceCounter;

public fixed uint Reserved33E8[6];

#pragma warning restore CS0649

}

}

enum DependentQmdType

{

Queue,

}

/// <summary>

enum ReleaseMembarType

{

FeNone,

}

/// <summary>

{

L1None,

L1Sysmembar,

}

/// <summary>

enum Fp32NanBehavior

{

Legacy,

}

/// <summary>

enum Fp32F2iNanBehavior

{

PassZero,

}

/// <summary>

enum ApiVisibleCallLimit

{

_32,

}

/// <summary>

enum SharedMemoryBankMapping

{

FourBytesPerBank,

}

/// <summary>

enum Fp32NarrowInstruction

{

KeepDenorms,

}

/// <summary>

{

DirectlyAddressableMemorySize16kb,

DirectlyAddressableMemorySize32kb,

}

/// <summary>

RedDec,

RedAnd,

RedOr,

}

/// <summary>

enum ReductionFormat

{

Unsigned32,

}

/// <summary>

enum StructureSize

{

FourWords,

}

/// <summary>

{

private fixed int _words[64];

[MethodImpl(MethodImplOptions.AggressiveInlining)]

{

if ((uint)bit >= 64 * 32)

{

}

[MethodImpl(MethodImplOptions.AggressiveInlining)]

{

if ((uint)lower >= 64 * 32)

{

return (_words[lower >> 5] >> (lower & 31)) & mask;

}

}

{

False,

True,

}

}

SrcLinear = 1 << 7,

DstLinear = 1 << 8,

MultiLineEnable = 1 << 9,

}

/// <summary>

/// Texture parameters for copy.

/// </summary>

{

/// <summary>

/// Copy region X coordinate.

_3dEngine = threedEngine;

_state = new DeviceState<DmaClassState>(new Dictionary<string, RwCallback>

{

});

}

// all be rewritten to use pooled arrays, but that gets complicated with packed data and strides

Span<byte> dstSpan = memoryManager.GetSpan(dstGpuVa + (ulong)dstBaseOffset, dstSize).ToArray();

// If remapping is enabled, we always copy the components directly, in order.

// If it's enabled, but the mapping is just XYZW, we also copy them in order.

switch (srcBpp)

{

}

}

else

switch (componentSize)

{

}

}

0 => _state.State.SetRemapComponentsDstX,

1 => _state.State.SetRemapComponentsDstY,

2 => _state.State.SetRemapComponentsDstZ,

};

switch (componentsDst)

{

case SetRemapComponentsDst.SrcX:

break;

case SetRemapComponentsDst.SrcY:

break;

case SetRemapComponentsDst.SrcZ:

break;

case SetRemapComponentsDst.SrcW:

break;

case SetRemapComponentsDst.ConstA:

break;

case SetRemapComponentsDst.ConstB:

break;

}

}

/// </summary>

unsafe struct DmaClassState

{

public fixed uint Reserved00[64];

public uint Nop;

public fixed uint Reserved104[15];

public uint PmTrigger;

public fixed uint Reserved144[63];

public uint SetSemaphoreA;

public uint SetSemaphoreB;

public uint SetSemaphorePayload;

public fixed uint Reserved24C[2];

public uint SetRenderEnableA;

public uint SetRenderEnableB;

public uint SetRenderEnableC;

public uint SetSrcPhysMode;

public uint SetDstPhysMode;

public fixed uint Reserved268[38];

public uint LaunchDma;

public fixed uint Reserved304[63];

public uint OffsetInUpper;

public uint OffsetInLower;

public uint OffsetOutUpper;

public uint OffsetOutLower;

public uint PitchIn;

public uint PitchOut;

public uint SetRemapConstA;

public uint SetRemapConstB;

public uint SetRemapComponents;

public uint SetDstBlockSize;

public uint SetDstWidth;

public uint SetDstHeight;

public uint SetDstDepth;

public uint SetDstLayer;

public uint SetDstOrigin;

public uint Reserved724;

public uint SetSrcBlockSize;

public uint SetSrcWidth;

public uint SetSrcHeight;

public uint SetSrcDepth;

public uint SetSrcLayer;

public uint SetSrcOrigin;

public fixed uint Reserved740[629];

public uint PmTriggerEnd;

public fixed uint Reserved1118[2490];

/// </summary>

struct DmaTexture

{

public MemoryLayout MemoryLayout;

public int Width;

public int Height;

public ushort RegionY;

#pragma warning restore CS0649

}

Grp0SetSubDevMask = 1,

Grp0StoreSubDevMask = 2,

Grp0UseSubDevMask = 3,

}

enum SecOp

ImmdDataMethod = 4,

OneInc = 5,

Reserved6 = 6,

}

struct CompressedMethod

{

public uint Method;

#pragma warning restore CS0649

}

}

struct GPEntry

{

public uint Entry0;

#pragma warning restore CS0649

public uint Entry1;

#pragma warning restore CS0649

}

}

private readonly GPFifoProcessor _parent;

private readonly DeviceState<GPFifoClassState> _state;

private bool _createSyncPending;

private const int MacrosCount = 0x80;

{ nameof(GPFifoClassState.SetReference), new RwCallback(SetReference, null) },

{ nameof(GPFifoClassState.LoadMmeInstructionRam), new RwCallback(LoadMmeInstructionRam, null) },

{ nameof(GPFifoClassState.LoadMmeStartAddressRam), new RwCallback(LoadMmeStartAddressRam, null) },

});

_macros = new Macro[MacrosCount];

Release = 2,

AcqGeq = 4,

AcqAnd = 8,

}

/// <summary>

enum SemaphoredAcquireSwitch

{

Disabled = 0,

}

/// <summary>

enum SemaphoredReleaseWfi

{

En = 0,

}

/// <summary>

enum SemaphoredReleaseSize

{

SixteenBytes = 0,

}

/// <summary>

Or = 4,

Add = 5,

Inc = 6,

}

/// <summary>

enum SemaphoredFormat

{

Signed = 0,

}

/// <summary>

enum MemOpCTlbInvalidatePdb

{

One = 0,

}

/// <summary>

enum MemOpCTlbInvalidateGpc

{

Enable = 0,

}

/// <summary>

{

VidMem = 0,

SysMemCoherent = 2,

}

/// <summary>

L2PeermemInvalidate = 13,

L2SysmemInvalidate = 14,

L2CleanComptags = 15,

}

/// <summary>

enum SyncpointbOperation

{

Wait = 0,

}

/// <summary>

enum SyncpointbWaitSwitch

{

Dis = 0,

}

/// <summary>

enum WfiScope

{

CurrentScgType = 0,

}

/// <summary>

Nop = 0,

PbdmaTimeslice = 1,

RunlistTimeslice = 2,

}

/// <summary>

/// </summary>

struct GPFifoClassState

{

public uint SetObject;

public uint Illegal;

public uint Nop;

public uint Reserved0C;

public uint Semaphorea;

public uint Semaphoreb;

public uint Semaphorec;

public uint Semaphored;

public uint NonStallInterrupt;

public uint FbFlush;

public uint Reserved28;

public uint Reserved2C;

public uint MemOpC;

public uint MemOpD;

public uint Reserved38;

public uint Reserved3C;

public uint Reserved40;

public uint Reserved48;

public uint Reserved4C;

public uint SetReference;

public uint Reserved54;

public uint Reserved58;

public uint Reserved5C;

public uint Reserved68;

public uint Reserved6C;

public uint Syncpointa;

public uint Syncpointb;

public uint Wfi;

public uint CrcCheck;

public uint Yield;

// TODO: Eventually move this to per-engine state.

public Array31<uint> Reserved84;

public uint NoOperation;

private enum CommandBufferType

{

Prefetch,

}

/// <summary>

/// <param name="memoryManager">The memory manager used to fetch the data</param>

/// <param name="flush">If true, flushes potential GPU written data before reading the command buffer</param>

/// <returns>The fetched data</returns>

{

return MemoryMarshal.Cast<byte, int>(memoryManager.GetSpan(EntryAddress, (int)EntryCount * 4, flush));

}

/// <param name="memoryManager">The memory manager used to fetch the data</param>

/// <param name="flush">If true, flushes potential GPU written data before reading the command buffer</param>

/// <returns>The command buffer words</returns>

{

return Words ?? GetWords(memoryManager, flush);

}

private readonly ConcurrentQueue<CommandBuffer> _commandBufferQueue;

private GPFifoProcessor _prevChannelProcessor;

private readonly bool _ibEnable;

Type = CommandBufferType.Prefetch,

Words = commandBuffer,

EntryAddress = ulong.MaxValue,

});

}

Type = type,

Words = null,

EntryAddress = startAddress,

};

}

flushCommandBuffer = false;

}

ReadOnlySpan<int> words = entry.Fetch(entry.Processor.MemoryManager, flushCommandBuffer);

// If we are changing the current channel,

{

0 => _3dClass,

3 => _2dClass,

};

if (state != null)

_state = new DeviceState<InlineToMemoryClassState>(new Dictionary<string, RwCallback>

{

{ nameof(InlineToMemoryClassState.LaunchDma), new RwCallback(LaunchDma, null) },

});

}

}

if (!_finished)

{

int copySize = Math.Min(data.Length, _buffer.Length - _offset);

_offset += copySize;

{

var memoryManager = _channel.MemoryManager;

if (_isLinear && _lineCount == 1)

{

_context.AdvanceSequence();

}

else

// This file was auto-generated from NVIDIA official Maxwell definitions.

namespace Ryujinx.Graphics.Gpu.Engine.InlineToMemory

{

/// <summary>

/// </summary>

unsafe struct InlineToMemoryClassState

{

public uint SetObject;

public fixed uint Reserved04[63];

public uint NoOperation;

public uint SetNotifyA;

public uint SetNotifyB;

public uint Notify;

public uint WaitForIdle;

public fixed uint Reserved114[7];

public uint SetGlobalRenderEnableA;

public uint SetGlobalRenderEnableB;

public uint SetGlobalRenderEnableC;

public uint SendGoIdle;

public uint PmTrigger;

public uint PmTriggerWfi;

public uint LineLengthIn;

public uint LineCount;

public uint OffsetOutUpper;

public uint OffsetOut;

public uint PitchOut;

public uint SetDstBlockSize;

public uint SetDstWidth;

public uint SetDstHeight;

public uint SetDstDepth;

public uint SetDstLayer;

public uint SetDstOriginBytesX;

public uint SetDstOriginSamplesY;

public uint LaunchDma;

public uint LoadInlineData;

public fixed uint Reserved1B8[9];

public uint SetI2mSemaphoreA;

public uint SetI2mSemaphoreB;

public uint SetI2mSemaphoreC;

public fixed uint Reserved1E8[2];

public uint SetI2mSpareNoop02;

public uint SetI2mSpareNoop03;

public fixed uint Reserved200[3200];

#pragma warning restore CS0649

}

}

BitfieldReplace = 2,

BitfieldExtractLslImm = 3,

BitfieldExtractLslReg = 4,

}

}

BitwiseOr = 9,

BitwiseAnd = 10,

BitwiseAndNot = 11,

}

}

MoveAndSend = 4,

FetchAndSetMaddr = 5,

MoveAndSetMaddrThenFetchAndSend = 6,

}

}

if (_executionEngine == null)

{

{

_executionEngine = new MacroHLE(processor, _hleFunction);

}

if (_executionPending)

{

_executionPending = false;

}

}

/// </summary>

/// <param name="gpuVa">GPU virtual address where the command word is located</param>

/// <param name="argument">Argument to be pushed</param>

{

_executionEngine?.Fifo.Enqueue(new FifoWord(gpuVa, argument));

}

private const int ColorStructSize = 0x40;

private const int ZetaLayerCountOffset = 0x1230;

private const int IndirectIndexedDataEntrySize = 0x14;

private readonly GPFifoProcessor _processor;

for (int i = 0; i < maxDrawCount; i++)

{

var count = FetchParam();

var instanceCount = FetchParam();

var firstIndex = FetchParam();

var firstVertex = FetchParam();

var firstInstance = FetchParam();

if (i == 0)

{

DrawArraysInstanced,

DrawElementsInstanced,

DrawElementsIndirect,

}

}

private static readonly TableEntry[] _table = new TableEntry[]

{

};

/// <summary>

{

ref var entry = ref _table[i];

if (hash == entry.Hash)

{

if (IsMacroHLESupported(caps, entry.Name))

/// </summary>

public Queue<FifoWord> Fifo { get; }

private int _methAddr;

private int _methIncr;

return (int)result;

}

throw new InvalidOperationException($"Invalid operation \"{aluOp}\" on instruction 0x{_opCode:X8}.");

/// <param name="state">Current GPU state</param>

/// <param name="reg">Register offset to read</param>

/// <returns>GPU register value</returns>

{

return state.Read(reg * 4);

}

_methAddr += _methIncr;

}

}

/// </summary>

class MacroJit : IMacroEE

{

/// <summary>

/// Arguments FIFO.

{

if (_execute == null)

{

_execute = compiler.Compile(code);

}

/// <returns>Delegate of the host compiled code</returns>

public MacroExecute Compile(ReadOnlySpan<int> code)

{

int lastTarget = 0;

int i;

/// <summary>

/// Arguments FIFO.

/// </summary>

/// <summary>

/// Fetches a arguments from the arguments FIFO.

[StructLayout(LayoutKind.Sequential, Size = 1024)]

struct MmeShadowScratch

{

private uint _e0;

#pragma warning restore CS0169

public ref uint this[int index] => ref AsSpan()[index];

MethodPassthrough = 2,

MethodReplay = 3,

}

{

return format switch

{

TextureFormat.R8Unorm => Format.R8Unorm,

TextureFormat.R8Snorm => Format.R8Snorm,

TextureFormat.R8Uint => Format.R8Uint,

TextureFormat.R10G10B10A2Unorm => Format.R10G10B10A2Unorm,

TextureFormat.R10G10B10A2Uint => Format.R10G10B10A2Uint,

TextureFormat.R11G11B10Float => Format.R11G11B10Float,

};

}

}

new AdvancedBlendUcode(AdvancedBlendOp.HslHue, AdvancedBlendOverlap.Conjoint, false, GenConjointHslHue),

new AdvancedBlendUcode(AdvancedBlendOp.HslSaturation, AdvancedBlendOverlap.Conjoint, false, GenConjointHslSaturation),

new AdvancedBlendUcode(AdvancedBlendOp.HslColor, AdvancedBlendOverlap.Conjoint, false, GenConjointHslColor),

};

public static string GenTable()

{

// This can be used to generate the table on AdvancedBlendPreGenTable.

sb.AppendLine($"private static Dictionary<Hash128, AdvancedBlendEntry> _entries = new()");

sb.AppendLine("{");

return new FixedFunctionAlpha(BlendOp.MaximumGl, BlendFactor.OneGl, BlendFactor.OneGl);

}

}

/// <returns>True if the function was found, false otherwise</returns>

public bool TryGetAdvancedBlend(out AdvancedBlendDescriptor descriptor)

{

byte codeLength = (byte)_state.State.BlendUcodeSize;

if (currentCode.Length > codeLength)

{

}

Hash128 hash = XXHash128.ComputeHash(MemoryMarshal.Cast<uint, byte>(currentCode));

return true;

}

}

/// <summary>

/// Advanced blend function entry.

/// </summary>

{

/// <summary>

/// Advanced blend operation.

{ new Hash128(0x8652300E32D93050, 0x9460E7B449132371), new AdvancedBlendEntry(AdvancedBlendOp.HslLuminosity, AdvancedBlendOverlap.Conjoint, false, new[] { new RgbFloat(0.3f, 0.59f, 0.11f) }, new FixedFunctionAlpha(BlendUcodeEnable.EnableRGB, BlendOp.MaximumGl, BlendFactor.OneGl, BlendFactor.OneGl)) },

};

}

/// <summary>

/// Fixed function alpha state used for a advanced blend function.

/// </summary>

{

/// <summary>

/// Fixed function alpha state with alpha blending disabled.

/// </summary>

/// <summary>

/// Individual enable bits for the RGB and alpha components.

/// <summary>

/// Advanced blend microcode state.

/// </summary>

{

/// <summary>

/// Advanced blend operation.

Overlap = overlap;

SrcPreMultiplied = srcPreMultiplied;

Alpha = genFunc(ref asm);

Code = asm.GetCode();

Constants = asm.GetConstants();

}

}

Max = 3,

Rcp = 4,

Add = 5,

}

/// <summary>

LT = 4,

LE = 5,

GT = 6,

}

/// <summary>

Temp1 = 0xa,

Temp2 = 0xb,

PBR = 0xc,

}

/// <summary>

Temp0 = 4,

Temp1 = 5,

Temp2 = 6,

}

/// <summary>

Temp0 = 0,

Temp1 = 1,

Temp2 = 2,

}

/// <summary>

RRR = 2,

GGG = 3,

BBB = 4,

}

/// <summary>

RGB = 0,

R = 1,

G = 2,

}

/// <summary>

/// Floating-point RGB color values.

/// </summary>

{

/// <summary>

/// Red component value.

/// <summary>

/// Blend microcode destination operand, including swizzle, write mask and condition code update flag.

/// </summary>

{

public OpDst Dst { get; }

public Swizzle Swizzle { get; }

/// <summary>

/// Blend microcode operaiton.

/// </summary>

{

public readonly uint Word;

_constantIndex = index;

}

{

return _code?.ToArray();

}

{

return _constants;

}

}

private ulong _ubFollowUpAddress = 0;

private ulong _ubByteCount = 0;

private int _ubIndex = 0;

/// <summary>

/// Creates a new instance of the constant buffer updater.

{

int firstVertex = (int)_state.State.FirstVertex;

_channel.BufferManager.SetIndexBuffer(br, IndexType.UInt);

}

else

{

var drawState = _state.State.VertexBufferDrawState;

_context.Renderer.Pipeline.Draw(drawVertexCount, 1, drawFirstVertex, firstInstance);

}

if (indexedInline)

{

int inlineIndexCount = _drawState.IbStreamer.GetAndResetInlineIndexCount(_context.Renderer);

_channel.BufferManager.SetIndexBuffer(br, IndexType.UInt);

}

Span<Rectangle<int>> scissors = stackalloc Rectangle<int>[]

{

};

_context.Renderer.Pipeline.SetScissors(scissors);

{

var clearColor = _state.State.ClearColors;

_context.Renderer.Pipeline.ClearRenderTargetColor(index, layer, layerCount, componentMask, color);

}

/// <summary>

/// Index buffer data streamer for inline index buffer updates, such as those used in legacy OpenGL.

/// </summary>

}

}

using Ryujinx.Common;

using Ryujinx.Graphics.GAL;

using System.Runtime.InteropServices;

namespace Ryujinx.Graphics.Gpu.Engine.Threed

private int _inlineIndexBufferSize;

private int _inlineIndexCount;

private uint[] _buffer;

/// <summary>

/// Indicates if any index buffer data has been pushed.

/// </summary>

/// <summary>

/// Total numbers of indices that have been pushed.

/// </summary>

/// <summary>

/// Gets the handle for the host buffer currently holding the inline index buffer data.

/// </summary>

/// <returns>Host buffer handle</returns>

{

return _inlineIndexBuffer;

}

/// <summary>

/// Gets the number of elements on the current inline index buffer,

/// </summary>

/// <param name="renderer">Host renderer</param>

public int GetAndResetInlineIndexCount(IRenderer renderer)

{

UpdateRemaining(renderer);

/// <param name="value">Index value to be written</param>

private void PushData(IRenderer renderer, int offset, uint value)

{

// We upload data in chunks.

// If we are at the start of a chunk, then the buffer might be full,

int baseOffset = (offset - count) * sizeof(uint);

int length = count * sizeof(uint);

BufferHandle buffer = GetInlineIndexBuffer(renderer, baseOffset, length);

}

/// <summary>

namespace Ryujinx.Graphics.Gpu.Engine.Threed

{

/// <summary>

/// Indirect draw type, which can be indexed or non-indexed, with or without a draw count.

/// </summary>

enum IndirectDrawType

{

/// <summary>

/// <summary>

/// Draw count flag.

/// </summary>

}

/// <summary>

/// Default update flags for draw.

/// </summary>

}

}

using Ryujinx.Graphics.GAL;

namespace Ryujinx.Graphics.Gpu.Engine.Threed

{

{

Release = 0,

Acquire = 1,

}

/// <summary>

ClipperInputPrimitives = 0x1c,

ClipperOutputPrimitives = 0x1d,

FragmentShaderInvocations = 0x1e,

}

/// <summary>

TransformFeedbackOffset = 0x1a,

TessControlShaderInvocations = 0x1b,

TessEvaluationShaderInvocations = 0x1d,

}

private readonly GpuContext _context;

switch (op)

{

}

}

void resultHandler(object evt, ulong result)

{

{

Counter = result,

};

if (counter?.Invalid != true)

{

VertexAttribType.Sint => AttributeType.Sint,

VertexAttribType.Uint => AttributeType.Uint,

};

if (attributeTypes[location] != value)

private readonly ShaderProgramInfo[] _currentProgramInfo;

private ShaderSpecializationState _shaderSpecState;

private ProgramPipelineState _pipeline;

private uint _vbEnableMask;

private bool _prevDrawIndexed;

private IndexType _prevIndexType;

private uint _prevFirstVertex;

private bool _prevTfEnable;

int samplesInY = msaaMode.SamplesInY();

var scissor = _state.State.ScreenScissorState;

int clipRegionWidth = int.MaxValue;

int clipRegionHeight = int.MaxValue;

/// </summary>

private void UpdateDepthTestState()

{

_state.State.DepthTestEnable,

_state.State.DepthWriteEnable,

_state.State.DepthTestFunc);

height *= scale;

}

ViewportSwizzle swizzleX = transform.UnpackSwizzleX();

ViewportSwizzle swizzleY = transform.UnpackSwizzleY();

if (transform.ScaleZ < 0)

{

}

viewports[index] = new Viewport(region, swizzleX, swizzleY, swizzleZ, swizzleW, depthNear, depthFar);

backMask = test.FrontMask;

}

test.Enable,

test.FrontFunc,

test.FrontSFail,

{

VertexAttribType.Sint => Format.R32G32B32A32Sint,

VertexAttribType.Uint => Format.R32G32B32A32Uint,

};

}

switch (indexBuffer.Type)

{

}

_channel.BufferManager.SetIndexBuffer(gpuVa, size, indexBuffer.Type);

_vtgWritesRtLayer = false;

Span<ulong> addressesSpan = addresses.AsSpan();

ulong baseAddress = _state.State.ShaderBaseAddress.Pack();

// ScaleZ = (Far - Near) / 2

// DepthNear/Far are sorted such as that Near is always less than Far.

depthMode = extents.DepthNear != transform.TranslateZ &&

? DepthMode.MinusOneToOne

: DepthMode.ZeroToOne;

}

{ nameof(ThreedClassState.UniformBufferBindTessControl), new RwCallback(ConstantBufferBindTessControl, null) },

{ nameof(ThreedClassState.UniformBufferBindTessEvaluation), new RwCallback(ConstantBufferBindTessEvaluation, null) },

{ nameof(ThreedClassState.UniformBufferBindGeometry), new RwCallback(ConstantBufferBindGeometry, null) },

});

_i2mClass = new InlineToMemoryClass(context, channel, initializeState: false);

TessellationControl,

TessellationEvaluation,

Geometry,

}

/// <summary>

/// </summary>

struct TessMode

{

public uint Packed;

#pragma warning restore CS0649

/// Unpacks the tessellation abstract patch type.

/// </summary>

/// <returns>Abtract patch type</returns>

{

return (TessPatchType)(Packed & 3);

}

/// Unpacks the spacing between tessellated vertices of the patch.

/// </summary>

/// <returns>Spacing between tessellated vertices</returns>

{

return (TessSpacing)((Packed >> 4) & 3);

}

/// Unpacks the primitive winding order.

/// </summary>

/// <returns>True if clockwise, false if counter-clockwise</returns>

{

return (Packed & (1 << 8)) != 0;

}

/// </summary>

struct TfBufferState

{

public Boolean32 Enable;

public GpuVa Address;

public int Size;

/// </summary>

struct TfState

{

public int BufferIndex;

public int VaryingsCount;

public int Stride;

/// </summary>

struct RtColorState

{

public GpuVa Address;

public int WidthOrStride;

public int Height;

/// </summary>

struct ViewportTransform

{

public float ScaleX;

public float ScaleY;

public float ScaleZ;

/// Unpacks viewport swizzle of the position X component.

/// </summary>

/// <returns>Swizzle enum value</returns>

{

return (ViewportSwizzle)(Swizzle & 7);

}

/// Unpacks viewport swizzle of the position Y component.

/// </summary>

/// <returns>Swizzle enum value</returns>

{

return (ViewportSwizzle)((Swizzle >> 4) & 7);

}

/// Unpacks viewport swizzle of the position Z component.

/// </summary>

/// <returns>Swizzle enum value</returns>

{

return (ViewportSwizzle)((Swizzle >> 8) & 7);

}

/// Unpacks viewport swizzle of the position W component.

/// </summary>

/// <returns>Swizzle enum value</returns>

{

return (ViewportSwizzle)((Swizzle >> 12) & 7);

}

/// </summary>

struct ViewportExtents

{

public ushort X;

public ushort Width;

public ushort Y;

/// </summary>

struct VertexBufferDrawState

{

public int First;

public int Count;

#pragma warning restore CS0649

/// </summary>

struct ClearColors

{

public float Red;

public float Green;

public float Blue;

/// </summary>

struct DepthBiasState

{

public Boolean32 PointEnable;

public Boolean32 LineEnable;

public Boolean32 FillEnable;

Disabled = 0,

EnableRGB = 1,

EnableAlpha = 2,

}

/// <summary>

/// </summary>

struct ScissorState

{

public Boolean32 Enable;

public ushort X1;

public ushort X2;

/// </summary>

struct StencilBackMasks

{

public int FuncRef;

public int Mask;

public int FuncMask;

/// </summary>

struct RtDepthStencilState

{

public GpuVa Address;

public ZetaFormat Format;

public MemoryLayout MemoryLayout;

/// </summary>

struct ScreenScissorState

{

public ushort X;

public ushort Width;

public ushort Y;

Size16 = 0x1b,

Size8 = 0x1d,

Rgb10A2 = 0x30,

}

/// <summary>

Uint = 4,

Uscaled = 5,

Sscaled = 6,

}

/// <summary>

/// </summary>

struct VertexAttribState

{

public uint Attribute;

#pragma warning restore CS0649

/// Unpacks the index of the vertex buffer this attribute belongs to.

/// </summary>

/// <returns>Vertex buffer index</returns>

{

return (int)(Attribute & 0x1f);

}

/// Unpacks the attribute constant flag.

/// </summary>

/// <returns>True if the attribute is constant, false otherwise</returns>

{

return (Attribute & 0x40) != 0;

}

/// Unpacks the offset, in bytes, of the attribute on the vertex buffer.

/// </summary>

/// <returns>Attribute offset in bytes</returns>

{

return (int)((Attribute >> 7) & 0x3fff);

}

/// Unpacks the Maxwell attribute format integer.

/// </summary>

/// <returns>Attribute format integer</returns>

{

return Attribute & 0x3fe00000;

}

/// Unpacks the Maxwell attribute size.

/// </summary>

/// <returns>Attribute size</returns>

{

return (VertexAttribSize)((Attribute >> 21) & 0x3f);

}

/// Unpacks the Maxwell attribute component type.

/// </summary>

/// <returns>Attribute component type</returns>

{

return (VertexAttribType)((Attribute >> 27) & 7);

}

/// </summary>

struct RtControl

{

public uint Packed;

#pragma warning restore CS0649

/// Unpacks the number of active draw buffers.

/// </summary>

/// <returns>Number of active draw buffers</returns>

{

return (int)(Packed & 0xf);

}

/// </summary>

/// <param name="index">Index of the draw buffer</param>

/// <returns>Attachment index</returns>

{

return (int)((Packed >> (4 + index * 3)) & 7);

}

/// </summary>

struct Size3D

{

public int Width;

public int Height;

public int Depth;

/// </summary>

struct StencilTestState

{

public Boolean32 Enable;

public StencilOp FrontSFail;

public StencilOp FrontDpFail;

enum YControl

{

NegateY = 1 << 0,

}

/// <summary>

/// </summary>

struct RgbHalf

{

public uint R;

public uint G;

public uint B;

/// Unpacks the red color component as a 16-bit float value.

/// </summary>

/// <returns>The component value</returns>

{

ushort value = (ushort)R;

return Unsafe.As<ushort, Half>(ref value);

/// Unpacks the green color component as a 16-bit float value.

/// </summary>

/// <returns>The component value</returns>

{

ushort value = (ushort)G;

return Unsafe.As<ushort, Half>(ref value);

/// Unpacks the blue color component as a 16-bit float value.

/// </summary>

/// <returns>The component value</returns>

{

ushort value = (ushort)B;

return Unsafe.As<ushort, Half>(ref value);

Always,

ResultNonZero,

Equal,

}

/// <summary>

/// </summary>

struct PoolState

{

public GpuVa Address;

public int MaximumId;

#pragma warning restore CS0649

/// </summary>

struct StencilBackTestState

{

public Boolean32 TwoSided;

public StencilOp BackSFail;

public StencilOp BackDpFail;

/// </summary>

struct PrimitiveRestartState

{

public Boolean32 Enable;

public int Index;

#pragma warning restore CS0649

/// </summary>

struct IndexBufferState

{

public GpuVa Address;

public GpuVa EndAddress;

public IndexType Type;

/// </summary>

struct FaceState

{

public Boolean32 CullEnable;

public FrontFace FrontFace;

public Face CullFace;

enum ViewVolumeClipControl

{

ForceDepthRangeZeroToOne = 1 << 0,

}

/// <summary>

/// </summary>

struct LogicalOpState

{

public Boolean32 Enable;

public LogicalOp LogicalOp;

#pragma warning restore CS0649

/// </summary>

struct RtColorMask

{

public uint Packed;

#pragma warning restore CS0649

/// Unpacks red channel enable.

/// </summary>

/// <returns>True to write the new red channel color, false to keep the old value</returns>

{

return (Packed & 0x1) != 0;

}

/// Unpacks green channel enable.

/// </summary>

/// <returns>True to write the new green channel color, false to keep the old value</returns>

{

return (Packed & 0x10) != 0;

}

/// Unpacks blue channel enable.

/// </summary>

/// <returns>True to write the new blue channel color, false to keep the old value</returns>

{

return (Packed & 0x100) != 0;

}

/// Unpacks alpha channel enable.

/// </summary>

/// <returns>True to write the new alpha channel color, false to keep the old value</returns>

{

return (Packed & 0x1000) != 0;

}

/// </summary>

struct VertexBufferState

{

public uint Control;

public GpuVa Address;

public int Divisor;

/// Vertex buffer stride, defined as the number of bytes occupied by each vertex in memory.

/// </summary>

/// <returns>Vertex buffer stride</returns>

{

return (int)(Control & 0xfff);

}

/// Vertex buffer enable.

/// </summary>

/// <returns>True if the vertex buffer is enabled, false otherwise</returns>

{

return (Control & (1 << 12)) != 0;

}

/// </summary>

struct BlendStateCommon

{

public Boolean32 SeparateAlpha;

public BlendOp ColorOp;

public BlendFactor ColorSrcFactor;

/// </summary>

struct BlendState

{

public Boolean32 SeparateAlpha;

public BlendOp ColorOp;

public BlendFactor ColorSrcFactor;

/// </summary>

struct ShaderState

{

public uint Control;

public uint Offset;

public uint Unknown0x8;

/// Must be ignored for vertex shaders, those are always enabled.

/// </summary>

/// <returns>True if the stage is enabled, false otherwise</returns>

{

return (Control & 1) != 0;

}

/// </summary>

struct UniformBufferState

{

public int Size;

public GpuVa Address;

public int Offset;

unsafe struct ThreedClassState : IShadowState

{

public uint SetObject;

public fixed uint Reserved04[63];

public uint NoOperation;

public uint SetNotifyA;

public uint SetNotifyB;

public uint Notify;

public uint WaitForIdle;

public uint LoadMmeInstructionRamPointer;

public uint LoadMmeInstructionRam;

public uint LoadMmeStartAddressRamPointer;

public uint LoadMmeStartAddressRam;

public uint SetMmeShadowRamControl;

public fixed uint Reserved128[2];

public uint SetGlobalRenderEnableA;

public uint SetGlobalRenderEnableB;

public uint SetGlobalRenderEnableC;

public uint SendGoIdle;

public uint PmTrigger;

public uint PmTriggerWfi;

public uint LineLengthIn;

public uint LineCount;

public uint OffsetOutUpper;

public uint OffsetOut;

public uint PitchOut;

public uint SetDstBlockSize;

public uint SetDstWidth;

public uint SetDstHeight;

public uint SetDstDepth;

public uint SetDstLayer;

public uint SetDstOriginBytesX;

public uint SetDstOriginSamplesY;

public uint LaunchDma;

public uint LoadInlineData;

public fixed uint Reserved1B8[22];

public Boolean32 EarlyZForce;

public fixed uint Reserved260C[125];

public Array4<Array32<uint>> TfVaryingLocations;

public fixed uint Reserved2A00[640];

#pragma warning restore CS0649

}

}

_channel = channel;

_state = new DeviceState<TwodClassState>(new Dictionary<string, RwCallback>

{

});

}

/// <param name="lhsFormat">Format of the first texture</param>

/// <param name="rhsFormat">Format of the second texture</param>

/// <returns>True if the data is compatible, false otherwise</returns>

{

if (lhsFormat.BytesPerPixel != rhsFormat.BytesPerPixel ||

lhs.Height != rhs.Height ||

/// <param name="x2">Region end x</param>

/// <param name="y2">Region end y</param>

/// <returns>True if the region covers the full texture, false otherwise</returns>

{

if (x1 != 0 || y1 != 0 || y2 != texture.Height)

{

for (int y = 0; y < height; y++)

{

offset += stride;

}

float scale = srcTexture.ScaleFactor;

float dstScale = dstTexture.ScaleFactor;

(int)Math.Ceiling(scale * (srcX1 / srcTexture.Info.SamplesInX)),

(int)Math.Ceiling(scale * (srcY1 / srcTexture.Info.SamplesInY)),

(int)Math.Ceiling(scale * (srcX2 / srcTexture.Info.SamplesInX)),

(int)Math.Ceiling(scale * (srcY2 / srcTexture.Info.SamplesInY)));

(int)Math.Ceiling(dstScale * (dstX1 / dstTexture.Info.SamplesInX)),

(int)Math.Ceiling(dstScale * (dstY1 / dstTexture.Info.SamplesInY)),

(int)Math.Ceiling(dstScale * (dstX2 / dstTexture.Info.SamplesInX)),

/// </summary>

struct RenderSolidPrimPoint

{

public uint SetX;

public uint Y;

#pragma warning restore CS0649

/// </summary>

unsafe struct TwodClassState : IShadowState

{

public uint SetObject;

public fixed uint Reserved04[63];

public uint NoOperation;

public uint SetNotifyA;

public uint SetNotifyB;

public uint Notify;

public uint WaitForIdle;

public uint LoadMmeInstructionRamPointer;

public uint LoadMmeInstructionRam;

public uint LoadMmeStartAddressRamPointer;

public uint LoadMmeStartAddressRam;

public uint SetMmeShadowRamControl;

public fixed uint Reserved128[2];

public uint SetGlobalRenderEnableA;

public uint SetGlobalRenderEnableB;

public uint SetGlobalRenderEnableC;

public uint SendGoIdle;

public uint PmTrigger;

public fixed uint Reserved144[3];

public uint SetInstrumentationMethodData;

public fixed uint Reserved158[37];

public uint SetMmeSwitchState;

public fixed uint Reserved1F0[4];

public uint SetDstFormat;

public uint SetDstMemoryLayout;

public uint SetDstBlockSize;

public uint SetDstDepth;

public uint SetDstLayer;

public uint SetDstPitch;

public uint SetDstWidth;

public uint SetDstHeight;

public uint SetDstOffsetUpper;

public uint SetDstOffsetLower;

public uint FlushAndInvalidateRopMiniCache;

public uint SetSpareNoop06;

public uint SetSrcFormat;

public uint SetSrcMemoryLayout;

public uint SetSrcBlockSize;

public uint SetSrcDepth;

public uint TwodInvalidateTextureDataCache;

public uint SetSrcPitch;

public uint SetSrcWidth;

public uint SetSrcHeight;

public uint SetSrcOffsetUpper;

public uint SetSrcOffsetLower;

public uint SetPixelsFromMemorySectorPromotion;

public uint SetSpareNoop12;

public uint SetNumProcessingClusters;

public uint SetRenderEnableA;

public uint SetRenderEnableB;

public uint SetRenderEnableC;

public uint SetSpareNoop08;

public uint SetSpareNoop01;

public uint SetSpareNoop11;

public uint SetClipWidth;

public uint SetClipHeight;

public uint SetClipEnable;

public uint SetColorKeyFormat;

public uint SetColorKey;

public uint SetColorKeyEnable;

public uint SetRop;

public uint SetBeta1;

public uint SetBeta4;

public uint SetOperation;

public uint SetPatternOffset;

public uint SetPatternSelect;

public uint SetDstColorRenderToZetaSurface;

public uint SetSpareNoop04;

public uint SetSpareNoop15;

public uint SetSpareNoop13;

public uint SetSpareNoop14;

public uint SetSpareNoop02;

public uint SetCompression;

public uint SetSpareNoop09;

public uint SetRenderEnableOverride;

public uint SetPixelsFromMemoryDirection;

public uint SetSpareNoop10;

public uint SetMonochromePatternColorFormat;

public uint SetMonochromePatternFormat;

public uint SetMonochromePatternColor0;

public uint SetMonochromePatternColor1;

public uint SetMonochromePattern0;

public uint SetRenderSolidPrimColor2;

public uint SetRenderSolidPrimColor3;

public uint SetMmeMemAddressA;

public uint SetMmeMemAddressB;

public uint SetMmeDataRamAddress;

public uint MmeDmaRead;

public uint MmeDmaReadFifoed;

public uint MmeDmaWrite;

public uint MmeDmaReduction;

public uint MmeDmaSysmembar;

public uint MmeDmaSync;

public uint SetMmeDataFifoConfig;

public fixed uint Reserved578[2];

public uint RenderSolidPrimMode;

public uint SetRenderSolidPrimColorFormat;

public uint SetRenderSolidPrimColor;

public uint SetRenderSolidLineTieBreakBits;

public fixed uint Reserved590[20];

public uint RenderSolidPrimPointXY;

public fixed uint Reserved5E4[7];

public Array64<RenderSolidPrimPoint> RenderSolidPrimPoint;

public uint SetPixelsFromCpuDataType;

public uint SetPixelsFromCpuColorFormat;

public uint SetPixelsFromCpuIndexFormat;

public uint SetPixelsFromCpuMonoFormat;

public uint SetPixelsFromCpuWrap;

public uint SetPixelsFromCpuColor0;

public uint SetPixelsFromCpuColor1;

public uint SetPixelsFromCpuMonoOpacity;

public fixed uint Reserved820[6];

public uint SetPixelsFromCpuSrcWidth;

public uint SetPixelsFromCpuSrcHeight;

public uint PixelsFromCpuData;

public fixed uint Reserved864[3];

public uint SetBigEndianControl;

public fixed uint Reserved874[3];

public uint SetPixelsFromMemoryBlockShape;

public uint SetPixelsFromMemoryCorralSize;

public uint SetPixelsFromMemorySafeOverlap;

public uint SetPixelsFromMemorySampleMode;

public fixed uint Reserved890[8];

public uint SetPixelsFromMemoryDstX0;

public uint SetPixelsFromMemoryDstY0;

public uint SetFalcon31;

public fixed uint Reserved960[291];

public uint MmeDmaWriteMethodBarrier;

public fixed uint ReservedDF0[2436];

#pragma warning restore CS0649

}

}

/// </summary>

struct TwodTexture

{

public ColorFormat Format;

public Boolean32 LinearLayout;

public MemoryLayout MemoryLayout;

/// <summary>

/// Boolean value, stored as a 32-bits integer in memory.

/// </summary>

{

#pragma warning restore CS0649

public static implicit operator bool(Boolean32 value)

enum ColorFormat

{

R32G32B32A32Float = 0xc0,

R32G32B32X32Float = 0xc3,

R16G16B16X16Unorm = 0xc6,

R16G16B16X16Snorm = 0xc7,

R16G16B16A16Float = 0xca,

R16G16B16X16Float = 0xce,

}

static class ColorFormatConverter

{

return format switch

{

ColorFormat.R32G32B32A32Float => new FormatInfo(Format.R32G32B32A32Float, 1, 1, 16, 4),

ColorFormat.R32G32B32A32Sint => new FormatInfo(Format.R32G32B32A32Sint, 1, 1, 16, 4),

ColorFormat.R32G32B32A32Uint => new FormatInfo(Format.R32G32B32A32Uint, 1, 1, 16, 4),

ColorFormat.B5G5R5X1Unorm => new FormatInfo(Format.B5G5R5A1Unorm, 1, 1, 2, 4),

ColorFormat.R8G8B8X8Unorm => new FormatInfo(Format.R8G8B8A8Unorm, 1, 1, 4, 4),

ColorFormat.R8G8B8X8Srgb => new FormatInfo(Format.R8G8B8A8Srgb, 1, 1, 4, 4),

};

}

case ColorFormat.R8G8B8X8Unorm:

case ColorFormat.R8G8B8X8Srgb:

return true;

}

}

}

/// </summary>

struct GpuVa

{

public uint High;

public uint Low;

#pragma warning restore CS0649

/// Packs the split address into a 64-bits address value.

/// </summary>

/// <returns>The 64-bits address value</returns>

{

return Low | ((ulong)High << 32);

}

/// </summary>

struct MemoryLayout

{

public uint Packed;

#pragma warning restore CS0649

{

return 1 << (int)(Packed & 0xf);

}

{

return 1 << (int)((Packed >> 4) & 0xf);

}

{

return 1 << (int)((Packed >> 8) & 0xf);

}

{

return (Packed & 0x1000) != 0;

}

{

return (Packed & 0x10000) != 0;

}

LineStripAdjacency,

TrianglesAdjacency,

TriangleStripAdjacency,

}

/// <summary>

LineStripAdjacency = 11,

TrianglesAdjacency = 12,

TriangleStripAdjacency = 13,

}

static class PrimitiveTypeConverter

{

return type switch

{

PrimitiveType.Points => PrimitiveTopology.Points,

PrimitiveType.Lines => PrimitiveTopology.Lines,

PrimitiveType.LineLoop => PrimitiveTopology.LineLoop,

PrimitiveType.TrianglesAdjacency => PrimitiveTopology.TrianglesAdjacency,

PrimitiveType.TriangleStripAdjacency => PrimitiveTopology.TriangleStripAdjacency,

PrimitiveType.Patches => PrimitiveTopology.Patches,

};

}

{

return type switch

{

PrimitiveTypeOverride.Points => PrimitiveTopology.Points,

PrimitiveTypeOverride.Lines => PrimitiveTopology.Lines,

PrimitiveTypeOverride.LineStrip => PrimitiveTopology.LineStrip,

PrimitiveTypeOverride.TrianglesAdjacency => PrimitiveTopology.TrianglesAdjacency,

PrimitiveTypeOverride.TriangleStripAdjacency => PrimitiveTopology.TriangleStripAdjacency,

PrimitiveTypeOverride.Patches => PrimitiveTopology.Patches,

};

}

}

/// </summary>

enum SamplerIndex

{

}

/// </summary>

struct SbDescriptor

{

public uint AddressLow;

public uint AddressHigh;

public int Size;

public int Padding;

#pragma warning restore CS0649

{

return AddressLow | ((ulong)AddressHigh << 32);

}

/// </summary>

enum ZetaFormat

{

D24UnormS8Uint = 0x14,

S8UintD24Unorm = 0x16,

}

static class ZetaFormatConverter

{

return format switch

{

ZetaFormat.D32Float => new FormatInfo(Format.D32Float, 1, 1, 4, 1),

ZetaFormat.D16Unorm => new FormatInfo(Format.D16Unorm, 1, 1, 2, 1),

ZetaFormat.D24UnormS8Uint => new FormatInfo(Format.D24UnormS8Uint, 1, 1, 4, 2),

ZetaFormat.S8UintD24Unorm => new FormatInfo(Format.S8UintD24Unorm, 1, 1, 4, 2),

ZetaFormat.S8Uint => new FormatInfo(Format.S8Uint, 1, 1, 1, 1),

ZetaFormat.D32FloatS8Uint => new FormatInfo(Format.D32FloatS8Uint, 1, 1, 8, 2),

};

}

}

/// </summary>

public void Dispose()

{

_context.DeferredActions.Enqueue(Destroy);

}

private bool _pendingSync;

private long _modifiedSequence;

/// <summary>

/// Creates a new instance of the GPU emulation context.

/// <returns>The current GPU timestamp</returns>

public ulong GetTimestamp()

{

ulong ticks = ConvertNanosecondsToTicks((ulong)PerformanceCounter.ElapsedNanoseconds) - _firstTimestamp;

if (GraphicsConfig.FastGpuTime)

Renderer.Dispose();

}

}

namespace Ryujinx.Graphics.Gpu

{

/// <summary>

/// General GPU and graphics configuration.

/// </summary>

/// </summary>

public static bool EnableTextureRecompression = false;

}

private HashSet<ShortTextureCacheEntry> _shortCacheBuilder;

private HashSet<ShortTextureCacheEntry> _shortCache;

/// <summary>

/// Creates a new instance of the automatic deletion cache.

return _textures.GetEnumerator();

}

}

/// <summary>

/// A default, generic RGBA8 texture format.

/// </summary>

/// <summary>

/// The format of the texture data.

/// <param name="bytesPerPixel">The number of bytes occupied by a single pixel in memory of the texture data</param>

public FormatInfo(

Format format,

{

BytesPerPixel = bytesPerPixel;

}

}

using Ryujinx.Graphics.GAL;

using System.Collections.Generic;

namespace Ryujinx.Graphics.Gpu.Image

{

/// </summary>

static class FormatTable

{

private enum TextureFormat : uint

{

// Formats

A5B5G5R1Unorm = A5B5G5R1 | RUnorm | GUnorm | BUnorm | AUnorm, // 0x24913

}

private enum VertexAttributeFormat : uint

{

// Width

A2B10G10R10Sscaled = (A2B10G10R10 << 21) | (Sscaled << 27), // 0x36000000

}

{

{ TextureFormat.R8Unorm, new FormatInfo(Format.R8Unorm, 1, 1, 1, 1) },

{ TextureFormat.R8Snorm, new FormatInfo(Format.R8Snorm, 1, 1, 1, 1) },

{ TextureFormat.Astc2D10x10UnormSrgb, new FormatInfo(Format.Astc10x10Srgb, 10, 10, 16, 4) },

{ TextureFormat.Astc2D12x10UnormSrgb, new FormatInfo(Format.Astc12x10Srgb, 12, 10, 16, 4) },

{ TextureFormat.Astc2D12x12UnormSrgb, new FormatInfo(Format.Astc12x12Srgb, 12, 12, 16, 4) },

};

{

{ VertexAttributeFormat.R8Unorm, Format.R8Unorm },

{ VertexAttributeFormat.R8Snorm, Format.R8Snorm },

{ VertexAttributeFormat.A2B10G10R10Snorm, Format.R10G10B10A2Snorm },

{ VertexAttributeFormat.A2B10G10R10Sint, Format.R10G10B10A2Sint },

{ VertexAttributeFormat.A2B10G10R10Uscaled, Format.R10G10B10A2Uscaled },

};

/// <summary>

/// Try getting the texture format from an encoded format integer from the Maxwell texture descriptor.

return _attribFormats.TryGetValue((VertexAttributeFormat)encoded, out format);

}

}

DescriptorCache = new T2[count];

Address = address;

_memoryTracking = physicalMemory.BeginGranularTracking(address, size, ResourceKind.Pool);

_memoryTracking.RegisterPreciseAction(address, size, PreciseAction);

_memoryTracking.Dispose();

}

}

_pools.Clear();

}

}

{

Average,

Minimum,

}

}

AddressMode addressP = descriptor.UnpackAddressP();

CompareMode compareMode = descriptor.UnpackCompareMode();

descriptor.BorderColorR,

descriptor.BorderColorG,

descriptor.BorderColorB,

descriptor.BorderColorA);

float mipLodBias = descriptor.UnpackMipLodBias();

float maxRequestedAnisotropy = descriptor.UnpackMaxAnisotropy();

_anisoSampler?.Dispose();

}

}

0.45833334f,

0.46153846f,

0.4642857f,

};

private static readonly float[] _maxAnisotropyLut = new float[]

{

};

private const float Frac8ToF32 = 1.0f / 256.0f;

public uint Word0;

public uint Word1;

public uint Word2;

/// Unpacks the texture wrap mode along the X axis.

/// </summary>

/// <returns>The texture wrap mode enum</returns>

{

return (AddressMode)(Word0 & 7);

}

/// Unpacks the texture wrap mode along the Y axis.

/// </summary>

/// <returns>The texture wrap mode enum</returns>

{

return (AddressMode)((Word0 >> 3) & 7);

}

/// Unpacks the texture wrap mode along the Z axis.

/// </summary>

/// <returns>The texture wrap mode enum</returns>

{

return (AddressMode)((Word0 >> 6) & 7);

}

/// This is only relevant for shaders with shadow samplers.

/// </summary>

/// <returns>The depth comparison mode enum</returns>

{

return (CompareMode)((Word0 >> 9) & 1);

}

/// This is only relevant for shaders with shadow samplers.

/// </summary>

/// <returns>The depth comparison operation enum</returns>

{

return (CompareOp)(((Word0 >> 10) & 7) + 1);

}

/// Unpacks and converts the maximum anisotropy value used for texture anisotropic filtering.

/// </summary>

/// <returns>The maximum anisotropy</returns>

{

return _maxAnisotropyLut[(Word0 >> 20) & 7];

}

/// that is larger than the texture size.

/// </summary>

/// <returns>The magnification filter</returns>

{

return (MagFilter)(Word1 & 3);

}

/// that is smaller than the texture size.

/// </summary>

/// <returns>The minification filter</returns>

{

SamplerMinFilter minFilter = (SamplerMinFilter)((Word1 >> 4) & 3);

SamplerMipFilter mipFilter = (SamplerMipFilter)((Word1 >> 6) & 3);

case SamplerMipFilter.None:

switch (minFilter)

{

}

break;

case SamplerMipFilter.Nearest:

switch (minFilter)

{

}

break;

case SamplerMipFilter.Linear:

switch (minFilter)

{

}

break;

}

/// Unpacks the seamless cubemap flag.

/// </summary>

/// <returns>The seamless cubemap flag</returns>

{

return (Word1 & (1 << 9)) != 0;

}

/// This describes how the final value will be computed from neighbouring pixels.

/// </summary>

/// <returns>The reduction filter</returns>

{

return (ReductionFilter)((Word1 >> 10) & 3);

}

/// which mipmap level to use from a given texture.

/// </summary>

/// <returns>The level-of-detail bias value</returns>

{

int fixedValue = (int)(Word1 >> 12) & 0x1fff;

/// Unpacks the level-of-detail snap value.

/// </summary>

/// <returns>The level-of-detail snap value</returns>

{

return _f5ToF32ConversionLut[(Word1 >> 26) & 0x1f];

}

/// Unpacks the minimum level-of-detail value.

/// </summary>

/// <returns>The minimum level-of-detail value</returns>

{

return (Word2 & 0xfff) * Frac8ToF32;

}

/// Unpacks the maximum level-of-detail value.

/// </summary>

/// <returns>The maximum level-of-detail value</returns>

{

return ((Word2 >> 12) & 0xfff) * Frac8ToF32;

}

enum SamplerMinFilter

{

Nearest = 1,

}

}

{

None = 1,

Nearest,

}

}

item?.Dispose();

}

}

return new SamplerPool(context, channel.MemoryManager.Physical, address, maximumId);

}

}

private bool _modifiedStale = true;

private ITexture _arrayViewTexture;

private ITexture _flushHostTexture;

private ITexture _setHostTexture;

/// <returns>The child texture</returns>

public Texture CreateView(TextureInfo info, SizeInfo sizeInfo, MultiRange range, int firstLayer, int firstLevel)

{

_context,

_physicalMemory,

info,

if (ScaleFactor != scale)

{

ScaleFactor = scale;

foreach (var view in _views)

{

view.ScaleFactor = scale;

TextureCreateInfo viewCreateInfo = TextureCache.GetCreateInfo(view.Info, _context.Capabilities, scale);

{

FormatInfo formatInfo = TextureCompatibility.ToHostCompatibleFormat(Info, _context.Capabilities);

Info.Width,

Info.Height,

target == Target.CubemapArray ? 6 : 1,

ITexture viewTexture = HostTexture.CreateView(createInfo, 0, 0);

_arrayViewTexture = viewTexture;

return viewTexture;

}

{

case Target.Texture1D:

case Target.Texture1DArray:

case Target.Texture2D:

case Target.Texture2DArray:

case Target.Cubemap:

case Target.CubemapArray:

case Target.Texture2DMultisample:

case Target.Texture2DMultisampleArray:

case Target.Texture3D:

return target == Target.Texture3D;

}

}

/// <summary>

Height = info.Height;

CanForceAnisotropy = CanTextureForceAnisotropy();

_layers = info.GetLayers();

}

}

}

}

/// <param name="flags">The texture's usage flags, indicating how it is used in the shader</param>

public TextureBindingInfo(Target target, Format format, int binding, int cbufSlot, int handle, TextureUsageFlags flags)

{

CbufSlot = cbufSlot;

}

/// <summary>

{

}

}

int stages = isCompute ? 1 : Constants.ShaderStages;

_textureBindings = new TextureBindingInfo[stages][];

_textureState = new TextureState[InitialTextureStateSize];

for (int stage = 0; stage < stages; stage++)

{

}

}

/// <summary>

/// Counts the total number of texture bindings used by all shader stages.

/// </summary>

{

int count = 0;

{

{

}

}

return count;

}

/// <summary>

/// Ensures that the texture bindings are visible to the host GPU.

}

private const int OverlapsBufferInitialCapacity = 10;

private readonly GpuContext _context;

private readonly PhysicalMemory _physicalMemory;

for (int i = 0; i < overlapCount; i++)

{

var other = _textureOverlaps[i];

if (texture != other &&

(texture.IsViewCompatible(other.Info, other.Range, true, other.LayerSize, _context.Capabilities, out _, out _) != TextureViewCompatibility.Incompatible ||

other.IsViewCompatible(texture.Info, texture.Range, true, texture.LayerSize, _context.Capabilities, out _, out _) != TextureViewCompatibility.Incompatible))

width = copyTexture.Width;

}

copyTexture.Address.Pack() + offset,

GetMinimumWidthInGob(width, sizeHint.Width, formatInfo.BytesPerPixel, copyTexture.LinearLayout),

copyTexture.Height,

// so the width we get here is the aligned width.

if (isLinear)

{

stride = colorState.WidthOrStride;

}

else

{

stride = 0;

}

colorState.Address.Pack(),

GetMinimumWidthInGob(width, sizeHint.Width, formatInfo.BytesPerPixel, isLinear),

colorState.Height,

FormatInfo formatInfo = dsState.Format.Convert();

dsState.Address.Pack(),

GetMinimumWidthInGob(size.Width, sizeHint.Width, formatInfo.BytesPerPixel, false),

size.Height,

}

}

int height = info.Height / info.SamplesInY;

int depth = info.GetDepth() * info.GetLayers();

if (scale != 1f)

{

height = (int)MathF.Ceiling(height * scale);

}

Astc10x8,

Astc10x10,

Astc12x10,

}

/// <summary>

{

TextureMatchQuality.Perfect => TextureViewCompatibility.Full,

TextureMatchQuality.FormatAlias => TextureViewCompatibility.FormatAlias,

};

}

/// <returns>Format class</returns>

private static FormatClass GetFormatClass(Format format)

{

}

}

/// </summary>

enum TextureComponent

{

Green = 3,

Alpha = 5,

OneSI = 6,

}

static class TextureComponentConverter

/// <returns>Converted enum</returns>

public static SwizzleComponent Convert(this TextureComponent component)

{

{

}

}

/// </summary>

struct TextureDescriptor : ITextureDescriptor, IEquatable<TextureDescriptor>

{

public uint Word0;

public uint Word1;

public uint Word2;

/// Unpacks Maxwell texture format integer.

/// </summary>

/// <returns>The texture format integer</returns>

{

return Word0 & 0x8007ffff;

}

/// Unpacks the swizzle component for the texture red color channel.

/// </summary>

/// <returns>The swizzle component</returns>

{

}

/// <summary>

/// Unpacks the swizzle component for the texture green color channel.

/// </summary>

/// <returns>The swizzle component</returns>

{

}

/// <summary>

/// Unpacks the swizzle component for the texture blue color channel.

/// </summary>

/// <returns>The swizzle component</returns>

{

}

/// <summary>

/// Unpacks the swizzle component for the texture alpha color channel.

/// </summary>

/// <returns>The swizzle component</returns>

{

}

/// <summary>

/// Unpacks the 40-bits texture GPU virtual address.

/// </summary>

/// <returns>The GPU virtual address</returns>

{

return Word1 | ((ulong)(Word2 & 0xffff) << 32);

}

/// This defines the texture layout, among other things.

/// </summary>

/// <returns>The texture descriptor type</returns>

{

return (TextureDescriptorType)((Word2 >> 21) & 7);

}

/// Always 32-bytes aligned.

/// </summary>

/// <returns>The linear texture stride</returns>

{

return (int)(Word3 & 0xffff) << 5;

}

/// Must be always 1, ignored by the GPU.

/// </summary>

/// <returns>THe GOB block X size</returns>

{

return 1 << (int)(Word3 & 7);

}

/// Must be always a power of 2, with a maximum value of 32.

/// </summary>

/// <returns>THe GOB block Y size</returns>

{

return 1 << (int)((Word3 >> 3) & 7);

}

/// Must be 1 for any texture target other than 3D textures.

/// </summary>

/// <returns>The GOB block Z size</returns>

{

return 1 << (int)((Word3 >> 6) & 7);

}

/// This is only used for sparse textures, should be 1 otherwise.

/// </summary>

/// <returns>The number of GOB blocks per tile</returns>

{

return 1 << (int)((Word3 >> 10) & 7);

}

/// Unpacks the number of mipmap levels of the texture.

/// </summary>

/// <returns>The number of mipmap levels</returns>

{

return (int)(Word3 >> 28) + 1;

}

/// Unpack the base level texture width size.

/// </summary>

/// <returns>The texture width</returns>

{

return (int)(Word4 & 0xffff) + 1;

}

/// Unpack the width of a buffer texture.

/// </summary>

/// <returns>The texture width</returns>

{

return (int)((Word4 & 0xffff) | (Word3 << 16)) + 1;

}

/// Unpacks the texture sRGB format flag.

/// </summary>

/// <returns>True if the texture is sRGB, false otherwise</returns>

{

return (Word4 & (1 << 22)) != 0;

}

/// Unpacks the texture target.

/// </summary>

/// <returns>The texture target</returns>

{

return (TextureTarget)((Word4 >> 23) & 0xf);

}

/// Should be ignored for 1D or buffer textures.

/// </summary>

/// <returns>The texture height or layers count</returns>

{

return (int)(Word5 & 0xffff) + 1;

}

/// The meaning of this value depends on the texture target.

/// </summary>

/// <returns>The texture depth, layer or faces count</returns>

{

return (int)((Word5 >> 16) & 0x3fff) + 1;

}

/// It must be set to false (by the guest driver) for rectangle textures.

/// </summary>

/// <returns>The texture coordinates normalized flag</returns>

{

return (Word5 & (1 << 31)) != 0;

}

/// Unpacks the base mipmap level of the texture.

/// </summary>

/// <returns>The base mipmap level of the texture</returns>

{

return (int)(Word7 & 0xf);

}

/// Usually equal to Levels minus 1.

/// </summary>

/// <returns>The maximum mipmap level (inclusive) of the texture</returns>

{

return (int)((Word7 >> 4) & 0xf);

}

/// Must be ignored for non-multisample textures.

/// </summary>

/// <returns>The multisample counts enum</returns>

{

return (TextureMsaaMode)((Word7 >> 8) & 0xf);

}

{

return Unsafe.As<TextureDescriptor, Vector256<byte>>(ref this).GetHashCode();

}

}

}

LinearColorKey,

Linear,

BlockLinear,

}

private int[] _allOffsets;

private int[] _sliceSizes;

private bool _hasMipViews;

private bool _hasLayerViews;

private MultiRange TextureRange => Storage.Range;

/// <summary>

/// Other texture groups that have incompatible overlaps with this one.

/// </summary>

private bool _incompatibleOverlapsDirty = true;

private BufferHandle _flushBuffer;

private bool _flushBufferImported;

int offsetIndex = GetOffsetIndex(info.BaseLayer + layer, info.BaseLevel + level);

int offset = _allOffsets[offsetIndex];

SpanOrArray<byte> result = Storage.ConvertToHostCompatibleFormat(data, info.BaseLevel + level, true);

{

for (int i = 0; i < _allOffsets.Length; i++)

{

MultiRange handleRange = Storage.Range.Slice((ulong)_allOffsets[i], 1);

ulong handleBase = handleRange.GetSubRange(0).Address;

for (int j = 0; j < other._handles.Length; j++)

{

MultiRange otherHandleRange = other.Storage.Range.Slice((ulong)other._allOffsets[j], 1);

ulong otherHandleBase = otherHandleRange.GetSubRange(0).Address;

private const int FlushBalanceMax = 60;

private const int FlushBalanceMin = -10;

private int _bindCount;

// Sync state for texture flush.

_group.HasCopyDependencies = true;

other._group.HasCopyDependencies = true;

dependency.Other = otherDependency;

otherDependency.Other = dependency;

/// <param name="swizzleB">Swizzle for the blue color channel</param>

/// <param name="swizzleA">Swizzle for the alpha color channel</param>

public TextureInfo(

DepthStencilMode depthStencilMode = DepthStencilMode.Depth,

{

GobBlocksInTileX = gobBlocksInTileX;

DepthStencilMode = depthStencilMode;

}

/// <summary>

// - If the parent format is not compressed, and the view is, the view

// size is calculated as described on the first point, but the width and height

// of the view must be also multiplied by the block width and height.

int height = Math.Max(1, parent.Info.Height >> firstLevel);

if (parent.Info.FormatInfo.IsCompressed && !FormatInfo.IsCompressed)

{

height = BitUtils.DivRoundUp(height, parent.Info.FormatInfo.BlockHeight);

}

else if (!parent.Info.FormatInfo.IsCompressed && FormatInfo.IsCompressed)

{

height *= FormatInfo.BlockHeight;

}

SwizzleA);

}

}

_context = context;

_channel = channel;

float[] scales = new float[64];

new Span<float>(scales).Fill(1f);

/// </summary>

/// <param name="texture">The texture to check</param>

/// <returns>True if the scale needs updating, false if the scale is up to date</returns>

{

return texture != null && !(texture.ScaleMode == TextureScaleMode.Blacklisted || texture.ScaleMode == TextureScaleMode.Undesired) && texture.ScaleFactor != GraphicsConfig.ResScale;

}

void ConsiderTarget(Texture target)

{

float scale = target.ScaleFactor;

switch (target.ScaleMode)

/// </remarks>

public void UpdateRenderTargetDepthStencil()

{

_rtHostDs = _rtDepthStencil?.HostTexture;

_context.Renderer.Pipeline.SetRenderTargets(_rtHostColors, _rtHostDs);

{

NoMatch,

FormatAlias,

}

}

Ms2x2 = 2,

Ms4x2 = 4,

Ms2x1 = 5,

}

static class TextureMsaaModeConverter

TextureMsaaMode.Ms2x2 => 4,

TextureMsaaMode.Ms4x2 => 8,

TextureMsaaMode.Ms4x4 => 16,

};

}

TextureMsaaMode.Ms2x2 => 2,

TextureMsaaMode.Ms4x2 => 4,

TextureMsaaMode.Ms4x4 => 4,

};

}

TextureMsaaMode.Ms2x2 => 2,

TextureMsaaMode.Ms4x2 => 2,

TextureMsaaMode.Ms4x4 => 4,

};

}

}

/// <summary>

/// A request to dereference a texture from a pool.

/// </summary>

{

/// <summary>

/// Whether the dereference is due to a mapping change or not.

}

private readonly GpuChannel _channel;

private TextureDescriptor _defaultDescriptor;

/// <summary>

/// <param name="descriptor">The texture descriptor</param>

/// <param name="layerSize">Layer size for textures using a sub-range of mipmap levels, otherwise 0</param>

/// <returns>The texture information</returns>

{

int depthOrLayers = descriptor.UnpackDepth();

TextureMsaaMode msaaMode = descriptor.UnpackTextureMsaaMode();

}

uint format = descriptor.UnpackFormat();

ulong gpuVa = descriptor.UnpackAddress();

// Linear textures don't support mipmaps, so we don't handle this case here.

if ((minLod != 0 || maxLod + 1 != levels) && target != Target.TextureBuffer && !isLinear)

{

int layers = TextureInfo.GetLayers(target, depthOrLayers);

SizeInfo sizeInfo = SizeCalculator.GetBlockLinearTextureSize(

// address if there is a overlapping texture on the cache that can contain the new texture.

gpuVa += (ulong)sizeInfo.GetMipOffset(minLod);

height = Math.Max(1, height >> minLod);

if (target == Target.Texture3D)

base.Dispose();

}

}

return new TexturePool(context, channel, address, maximumId);

}

}

Eligible = 0,

Scaled = 1,

Blacklisted = 2,

}

}

[Flags]

enum TextureSearchFlags

{

WithUpscale = 1 << 4,

}

Texture2DArray,

TextureBuffer,

Texture2DRect,

}

static class TextureTargetConverter

{

switch (target)

{

}

}

else

{

switch (target)

{

}

}

{

return target switch

{

TextureTarget.Texture1DArray => SamplerType.Texture1D | SamplerType.Array,

TextureTarget.Texture2DArray => SamplerType.Texture2D | SamplerType.Array,

};

}

}

LayoutIncompatible,

CopyOnly,

FormatAlias,

}

}

private int _sequenceNumber;

private bool _syncActionRegistered;

private int _referenceCount = 1;

/// <param name="baseBuffers">Buffers which this buffer contains, and will inherit tracking handles from</param>

public Buffer(GpuContext context, PhysicalMemory physicalMemory, ulong address, ulong size, IEnumerable<Buffer> baseBuffers = null)

{

_physicalMemory = physicalMemory;

Handle = context.Renderer.CreateBuffer((int)size, baseBuffers?.MaxBy(x => x.Size).Handle ?? BufferHandle.Null);

/// </summary>

private void EnsureRangeList()

{

}

/// <summary>

_syncActionRegistered = true;

}

{

if (_useGranular)

{

{

_memoryTracking.RegisterAction(_externalFlushDelegate);

}

EnsureRangeList();

DecrementReferenceCount();

}

}

Flags = flags;

}

}

class BufferCache : IDisposable

{

private const int OverlapsBufferInitialCapacity = 10;

private const ulong BufferAlignmentSize = 0x1000;

private const ulong BufferAlignmentMask = BufferAlignmentSize - 1;

{

Buffer buffer = _bufferOverlaps[index];

endAddress = Math.Max(endAddress, buffer.EndAddress);

lock (_buffers)

ulong newSize = endAddress - address;

lock (_buffers)

{

else

{

// No overlap, just create a new buffer.

lock (_buffers)

{

/// </summary>

/// <param name="dictionary">Dictionary to prune</param>

/// <param name="toDelete">List used to track entries to delete</param>

{

foreach (var entry in dictionary)

{

}

}

}

private readonly BuffersPerStage[] _gpUniformBuffers;

private BufferHandle _tfInfoBuffer;

private bool _gpStorageBuffersDirty;

private bool _gpUniformBuffersDirty;

{

if (isStorage)

{

}

else

{

}

}

using Ryujinx.Memory.Range;

using System;

using System.Collections.Generic;

{

private const int BackingInitialSize = 8;

private List<BufferMigration> _sources;

private BufferMigration _migrationTarget;

/// Adds a new counter to the counter cache, or updates a existing one.

/// </summary>

/// <param name="gpuVa">GPU virtual address where the counter will be written in memory</param>

public void AddOrUpdate(ulong gpuVa, ICounterEvent evt)

{

int index = BinarySearch(gpuVa);

if (index < 0)

{

_items[index].Event?.Flush();

return true;

else

{

return false;

int middle = left + (range >> 1);

if (item.Address == address)

{

public IndexType Type;

}

{

private const int PtLvl0Bits = 14;